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riscv/context_switch: Set tp when a context switch occurs #15652

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Jan 22, 2025
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riscv/context_switch: Set tp when a context switch occurs #15652

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9 changes: 4 additions & 5 deletions arch/risc-v/src/common/riscv_exception_common.S
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Original file line number Diff line number Diff line change
Expand Up @@ -153,6 +153,9 @@ exception_common:
REGSTORE s3, REG_SP(sp)

#ifdef CONFIG_LIB_SYSCALL
csrr tp, CSR_SCRATCH /* Load kernel TP */
REGLOAD tp, RISCV_PERCPU_TCB(tp)

/* Check whether it is an exception or interrupt */

blt s2, x0, handle_irq /* If cause < 0 it is interrupt */
Expand All @@ -177,9 +180,6 @@ exception_common:
addi s1, s1, 0x4 /* Must move EPC forward by +4 */
REGSTORE s1, REG_EPC(sp) /* Updated EPC to user context */

csrr tp, CSR_SCRATCH /* Load kernel TP */
REGLOAD tp, RISCV_PERCPU_TCB(tp)

mv a7, sp /* a7 = context */
call x1, dispatch_syscall /* Dispatch the system call */

Expand Down Expand Up @@ -246,9 +246,8 @@ return_from_exception:
#ifdef CONFIG_LIB_SYSCALL
/* Store tcb to scratch register */

call x1, nxsched_self
csrr s1, CSR_SCRATCH
REGSTORE a0, RISCV_PERCPU_TCB(s1)
REGSTORE tp, RISCV_PERCPU_TCB(s1)
#endif

#ifdef CONFIG_ARCH_KERNEL_STACK
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6 changes: 6 additions & 0 deletions arch/risc-v/src/common/riscv_initialstate.c
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Expand Up @@ -115,6 +115,12 @@ void up_initial_state(struct tcb_s *tcb)
/* Set idle process' initial interrupt context */

riscv_set_idleintctx();

#ifdef CONFIG_LIB_SYSCALL
/* Update current thread pointer */

__asm__ __volatile__("mv tp, %0" : : "r"(tcb));
#endif
return;
}

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6 changes: 6 additions & 0 deletions arch/risc-v/src/common/riscv_internal.h
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Expand Up @@ -282,6 +282,12 @@ static inline void riscv_restorecontext(struct tcb_s *tcb)

riscv_restorevpu(tcb->xcp.regs, riscv_vpuregs(tcb));
#endif

#ifdef CONFIG_LIB_SYSCALL
/* Update current thread pointer */

__asm__ __volatile__("mv tp, %0" : : "r"(tcb));
#endif
}

#ifdef CONFIG_ARCH_RISCV_INTXCPT_EXTENSIONS
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