Merge pull request #1 from ronitnallagatla/unpacked_array

New Rule: Forbid unpacked array declarations

MANUAL.md

@@ -5326,6 +5326,67 @@ The most relevant clauses of IEEE1800-2017 are:
 - 12.7 Loop statements
 
 
+
+* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
+
+## Syntax Rule: `unpacked_array`
+
+### Hint
+
+Avoid using unpacked arrays in variable declarations.
+
+### Reason
+
+Unpacked arrays can lead to issues during synthesis.
+
+### Pass Example (1 of 2)
+```systemverilog
+module M;
+
+logic [31:0] a;
+
+endmodule
+```
+
+### Pass Example (2 of 2)
+```systemverilog
+module M;
+
+logic [7:0][3:0] b;
+
+endmodule
+```
+
+### Fail Example (1 of 2)
+```systemverilog
+module M;
+
+logic a [7:0];
+
+endmodule;
+```
+
+### Fail Example (2 of 2)
+```systemverilog
+module M;
+
+logic [31:0] b [0:7];
+
+endmodule;
+```
+
+### Explanation
+
+This rule forbids unpacked array declarations.
+
+Unpacked arrays are not guaranteed to be represented as contiguous memory, and can cause issues with synthesis tools, especially with how multidimensional arrays are synthesized. For example, a synthesis tool might synthesize out unused memory locations of an unpacked array which is not the intended behavior.
+
+Additionally, packed arrays allow the user to intuitively index and slice the array and apply bitwise operations.
+
+The most relevant clauses of IEEE1800-2017 are:
+- 7.4 Packed and unpacked arrays
+
+
 # Naming Convention Syntax Rules
 
 Rules for checking against naming conventions are named with either the suffix

md/syntaxrules-explanation-unpacked_array.md

@@ -0,0 +1,8 @@
+This rule forbids unpacked array declarations.
+
+Unpacked arrays are not guaranteed to be represented as contiguous memory, and can cause issues with synthesis tools, especially with how multidimensional arrays are synthesized. For example, a synthesis tool might synthesize out unused memory locations of an unpacked array which is not the intended behavior.
+
+Additionally, packed arrays allow the user to intuitively index and slice the array and apply bitwise operations.
+
+The most relevant clauses of IEEE1800-2017 are:
+- 7.4 Packed and unpacked arrays

src/syntaxrules/unpacked_array.rs

@@ -0,0 +1,38 @@
+use crate::config::ConfigOption;
+use crate::linter::{SyntaxRule, SyntaxRuleResult};
+use sv_parser::{NodeEvent, RefNode, SyntaxTree};
+
+#[derive(Default)]
+pub struct UnpackedArray;
+
+impl SyntaxRule for UnpackedArray {
+    fn check(
+        &mut self,
+        _syntax_tree: &SyntaxTree,
+        event: &NodeEvent,
+        _option: &ConfigOption,
+    ) -> SyntaxRuleResult {
+        let node = match event {
+            NodeEvent::Enter(x) => x,
+            NodeEvent::Leave(_) => {
+                return SyntaxRuleResult::Pass;
+            }
+        };
+
+        match node {
+            RefNode::UnpackedDimension(_) => SyntaxRuleResult::Fail,
+            _ => SyntaxRuleResult::Pass,
+        }
+    }
+    fn name(&self) -> String {
+        String::from("unpacked_array")
+    }
+
+    fn hint(&self, _option: &ConfigOption) -> String {
+        String::from("Avoid using unpacked arrays in variable declarations.")
+    }
+
+    fn reason(&self) -> String {
+        String::from("Unpacked arrays can lead to issues during synthesis.")
+    }
+}

testcases/syntaxrules/fail/unpacked_array.sv

@@ -0,0 +1,11 @@
+module M;
+
+logic a [7:0];
+
+endmodule;
+////////////////////////////////////////////////////////////////////////////////
+module M;
+
+logic [31:0] b [0:7];
+
+endmodule;

testcases/syntaxrules/pass/unpacked_array.sv

@@ -0,0 +1,11 @@
+module M;
+
+logic [31:0] a;
+
+endmodule
+////////////////////////////////////////////////////////////////////////////////
+module M;
+
+logic [7:0][3:0] b;
+
+endmodule