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Xtensa patches (19.x) (Do not merge, PR created for easier review only) #109

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f810f79
[Xtensa] Move SHL/SRL/SRA/SRC lowering from ISelLowering to ISelDagTo…
andreisfr Aug 11, 2024
0414d44
[Xtensa] Minor fixes
andreisfr Aug 11, 2024
f05cf16
[Xtensa] Imrpove CTPOP lowering. Minor fixes int SHL/SRC/SRA operatio…
andreisfr Aug 12, 2024
a860cda
[Xtensa] Fix shift tests.
andreisfr Aug 12, 2024
87c8d07
[Xtensa] Implement load pseudo operations and patterns.
andreisfr Aug 14, 2024
ab3e8ed
[Xtensa] Support for variable arguments
andreisfr Aug 14, 2024
38fd8e9
[Xtensa] Add support for address intrinsics.
andreisfr Aug 14, 2024
2d780d8
[Xtensa] Add basic support for inline asm constraints
andreisfr Aug 14, 2024
ef77b89
[Xtensa] Implement volatile load/store.
andreisfr Aug 14, 2024
1903a38
[Xtensa] Implement branch analysis
andreisfr Aug 14, 2024
36cf87e
[Xtensa] Implement support for the BranchRelaxation
andreisfr Aug 14, 2024
e525aee
[Xtensa] Implement code density feature operations
andreisfr Aug 14, 2024
f48a873
[Xtensa] Add code size reduction pass.
andreisfr Aug 14, 2024
c9cd06d
[Xtensa] Implement Windowed feature operations
andreisfr Aug 17, 2024
4c5483f
[Xtensa] Implement Windowed Call ABI.
andreisfr Aug 18, 2024
3b8e821
[Xtensa] Fix reserving of the emergency spill slot.
andreisfr Aug 18, 2024
857dba2
[Xtensa] Implement Boolean feature operations
andreisfr Aug 18, 2024
69c4683
[Xtensa] Implement Floating-Point feature operations.
andreisfr Aug 19, 2024
549baa7
[Xtensa] Lowering Floating-Point Operations SELECT_CC/SETCC/BR_CC.
andreisfr Aug 19, 2024
6aabafc
[Xtensa] Implement DAG Combine for FADD and FSUB operations.
andreisfr Aug 19, 2024
5115e3e
[Xtensa] Implement Loop, SEXT and NSA features.
andreisfr Aug 19, 2024
d34a888
[Xtensa] Implement Mul32, Mul32High and Div32 features.
andreisfr Aug 19, 2024
403ab84
[Xtensa] Implement Mac16 feature and operations.
andreisfr Aug 19, 2024
66c182a
[Xtensa] Implement Xtensa features and operations.
andreisfr Aug 19, 2024
b30f4ab
[Xtensa] Implement Xtensa features and operations.
andreisfr Aug 19, 2024
967c0d0
[Xtensa] Add the Xtensa target.
andreisfr Aug 19, 2024
b72a9de
[Xtensa] Implement Xtensa ABI lowering.
andreisfr Aug 19, 2024
78cec6f
[Xtensa] Add subtargets ESP32. ESP8266 and ESP32-S2.
andreisfr Aug 19, 2024
6105f48
[Xtensa] Add esp32, esp8266 and esp32-s2 to valid cpu names.
andreisfr May 31, 2023
320130a
[Xtensa] Improve parsing of the SR and UR registers.
andreisfr Aug 19, 2024
ff64375
[Xtensa] Improve CFA support.
andreisfr Aug 19, 2024
fc8e75f
[Xtensa] Lowering Exception Selector and Pointer Registers.
andreisfr Aug 19, 2024
1bb2171
[Xtensa] Implement lowering GLobalTLSAddress operation.
andreisfr Aug 19, 2024
8da4565
[Xtensa] Lower ATOMIC_FENCE. Add Atomic Expand pass.
andreisfr Aug 19, 2024
1b5dbda
[Xtensa] Lower atomic_cmp_swap_(8/16/32) operations.
andreisfr Aug 19, 2024
a65aa3b
[Xtensa] Lower atomic_swap_(8/16/32) operations.
andreisfr Aug 19, 2024
c35f9b8
[Xtensa] Lower atomic operations.
andreisfr Aug 19, 2024
6b3b35d
[Xtensa] Implement Xtensa toolchain.
andreisfr Aug 19, 2024
c66d6ab
[Xtensa] Implement multilib support
andreisfr Aug 19, 2024
9878a96
[Xtensa] Implemented builtins base functionality for Xtensa.
andreisfr Aug 19, 2024
7734c14
[Xtensa] Implemented builtins for Xtensa MAC16 instructions.
andreisfr Aug 19, 2024
243ba42
[Xtensa] Implement lowering llvm intrinsics fshr/fshl.
andreisfr Aug 19, 2024
0759bc1
[Xtensa] Add functions needed to use as rust submodule.
andreisfr Aug 19, 2024
80c96e2
[Xtensa] Correct Call ABI for function return arguments.
andreisfr Aug 19, 2024
a9e083f
[Xtensa] Implement rest part of FP instructions.
andreisfr Aug 19, 2024
af3b6b0
[Xtensa] Correct lowering BR_CC with FP operands.
andreisfr Aug 19, 2024
e6e31ab
[Xtensa] Use ctors for Xtensa target by default.
andreisfr Aug 19, 2024
cc326bf
[Xtensa] Implement Hardware Loop optimization pass
andreisfr Aug 20, 2024
ff38375
[Xtensa] Change using of Frame Pointer.
andreisfr Aug 20, 2024
aa083bc
esp/maint: Adds Github workfows
andreisfr Aug 20, 2024
4798f82
[Xtensa] Implement esp32 psram cache fixes.
andreisfr Aug 20, 2024
41b711f
[Xtensa] Fix Hardware Loop optimization.
andreisfr Aug 20, 2024
90fcf34
[Xtensa] Support 'f' Inline Assembly Constraint
andreisfr Aug 20, 2024
cb25420
[Xtensa] Correction of the PSRAM fix pass.
andreisfr Aug 20, 2024
ed4dd68
[Xtensa] Correction of the hardware loop instrinsics detection.
andreisfr Aug 20, 2024
d7784a5
[Xtensa] Correction of the ESP32-S2 target.
andreisfr Aug 20, 2024
072c3e9
[Xtensa] Implement ESP32-S3 target.
andreisfr Aug 20, 2024
8bc37cf
[Xtensa] Define register type for CC.
andreisfr Aug 20, 2024
3e34835
[Xtensa] Fix FP instructions
andreisfr Sep 17, 2024
71e51f0
[Xtensa] Correcting FP instructions and intrinsics.
andreisfr Sep 17, 2024
31cf08b
[Xtensa] Implement MUL16 feature.
andreisfr Aug 20, 2024
292da84
[Xtensa] Add a no-op -mlongcalls option for better compatibility.
andreisfr Aug 20, 2024
ea93248
[Xtensa] Add atomicrmw_xchg test and fix atomic_swap.
andreisfr Aug 20, 2024
eb0f35e
[Xtensa] Initialize MCSubtargetInfo with esp32.
andreisfr Aug 20, 2024
803efc0
[Xtensa] Correction of the Hardware Loop pass.
andreisfr Aug 20, 2024
c6a6e27
[Xtensa] Initial porting compiler-rt library for Xtensa.
andreisfr Aug 20, 2024
9cf8481
[Xtensa] Add support of "-mcpu" option.
andreisfr Aug 20, 2024
03d4d99
[Xtensa] Improve Xtensa multilib support in clang.
andreisfr Aug 20, 2024
33749f2
[Xtensa] Add '--rtlib' option support for ESP Xtensa toolchain
andreisfr Aug 20, 2024
558537b
[Xtensa]: Add '-fuse-ld' option support to ESP Xtensa toolchain
andreisfr Aug 20, 2024
199fb2a
[Xtensa] Use B0 register for FP cmp operations.
andreisfr Aug 20, 2024
0ef0258
ci: add .gitlab-ci.yml to support CI/CD
andreisfr Aug 20, 2024
774e483
[Xtensa] Fix inline asm
andreisfr Aug 20, 2024
9487fa2
[Xtensa]: Fix handling of empty '-fuse-ld' option for ESP toolchain
andreisfr Aug 20, 2024
b092ffc
esp: Adds support for vendor 'Espressif' to target triple
andreisfr Aug 20, 2024
f10b5e2
[Xtensa] Fix multilib support.
andreisfr Aug 20, 2024
dffbf29
esp/riscv: Use GCC assembler for ESP RISCV chips
andreisfr Aug 20, 2024
18a41ad
esp/riscv: Adds support for 'riscv32-esp-elf' target triple
andreisfr Aug 20, 2024
0ef365a
riscv: Add default multilib.
andreisfr Aug 20, 2024
1342578
esp/riscv: Add multilib support for 'riscv32-esp-elf' GCC toolcahin
andreisfr Aug 20, 2024
16265ff
esp/riscv: Add 'libnosys' to linker command line by default
andreisfr Aug 20, 2024
1f71f41
esp/riscv: Exclude 'crt0.o' from linking in 'freestanding' mode
andreisfr May 31, 2023
776ea18
riscv: Add ESP toolchain tests
andreisfr May 31, 2023
d528774
[Xtensa] Remove redundant target features
andreisfr Oct 1, 2024
c124b89
[Xtensa] Implement support of the sysroot
andreisfr Sep 26, 2023
0654dc1
[Xtensa] Fix crtbegin/crtend implementation.
andreisfr May 31, 2023
15d5dd9
[Xtensa] Fix ill.n instruction econding
andreisfr May 31, 2023
7948e4f
ci/cd: fix clang version in gitlab-ci.yml
andreisfr Sep 17, 2024
1c85ac1
[Xtensa] fix compiler-rt crt build script
andreisfr Sep 26, 2023
ba244a5
[Xtensa] Implement asm macro for bbci/bbsi.
andreisfr Aug 20, 2024
b2c2d25
[Xtensa] Implement support of region asm directives in asm parser.
andreisfr Aug 20, 2024
6beb5f2
[Xtensa] Corrected asm parser.
andreisfr Aug 20, 2024
e6e04f0
riscv/gnu: Adds `no-rtti` multilib support
andreisfr Sep 26, 2023
0824de3
esp/ci: Adds MacOS x86_64/ARM64
andreisfr Sep 18, 2024
eae1fc8
esp/ci: Adds minimal distro with libraries/headres only
andreisfr May 31, 2023
8b57b01
esp/ci: Upgrade GCC toolchain to `esp-2022r1`
andreisfr May 31, 2023
3202cc9
esp/ci: Move newlib build to separate job
andreisfr May 31, 2023
0cbc93f
esp/ci: Adds Linux ARM/ARM64 universal toolchain builds
andreisfr May 31, 2023
17ae9db
esp/ci: Upgrade Clang ver to 15
andreisfr May 31, 2023
87b948d
esp/ci: Adds support to switch between legacy and universal toolchain…
andreisfr May 31, 2023
3186bda
esp/ci: Adds MacOS binaries signing stage
andreisfr May 31, 2023
78397d1
[Xtensa] Xtensa ABI 128bit arg alignment
andreisfr Aug 20, 2024
382069f
[Xtensa] Fix Call ABI for 16 byte alignment.
andreisfr Sep 26, 2023
ddaea28
[Xtensa] Add IR test for 16byte alignment.
andreisfr May 31, 2023
2d40eeb
esp/ci: Run LLD tests. Output test logs in lld-tests.log
andreisfr May 31, 2023
cdee9f6
[Xtensa] Fix atomic rmw operation.
andreisfr May 31, 2023
22b5ed6
[Xtensa] Fix Hardware Loop pass.
andreisfr May 31, 2023
fecd928
[Xtensa] Fix temporary mul.ll and hwloop_inner_loop.ll tests.
andreisfr Sep 18, 2024
90bd39f
[Xtensa] Add LLD linker support
andreisfr Aug 20, 2024
e366c60
[Xtensa][LLD] add more tests
andreisfr Apr 1, 2024
684ea9e
[Xtensa][LLD] Fix J formula
andreisfr Apr 1, 2024
53892bf
[Xtensa] Add emit constant pool option.
andreisfr Aug 20, 2024
83731b0
[Xtensa] Add support of the mcmodel option.
andreisfr May 31, 2023
8bf1f26
[Xtensa] Fix temporary clang/lib/Driver/Toolchains/Xtensa.cpp, enable…
andreisfr Sep 18, 2024
24752c1
esp/ci: Fixes Windows release archives
andreisfr May 31, 2023
4107731
esp/ci: Check for OOM failures after build
andreisfr May 31, 2023
9c66bf9
[LLD][Xtensa] Cover DIFF{8, 16, 32} relocations.
andreisfr May 31, 2023
ea2f535
[Xtensa] Implement constant islands pass
andreisfr Aug 20, 2024
e82c9c5
[Xtensa] Disable hardware loops by default.
andreisfr May 31, 2023
ad5d3e6
[Xtensa] Improve fixup error messages in asm backend.
andreisfr May 31, 2023
362f5ab
[Xtensa] Temporary fix hwloop tests.
andreisfr Sep 18, 2024
832401f
esp/ci: change clang version to 16.
andreisfr May 31, 2023
daaa5d9
toolchain: Adds compiler-rt multilibs support for Espressif toolchains
andreisfr Aug 20, 2024
0ea2cfc
esp/ci: Build compiler-rt
andreisfr May 31, 2023
0f090b1
[Xtensa] toolchain/xtensa: Enable `-frtti` by default for multilib di…
andreisfr Sep 18, 2024
4176bd8
toolchain/esp: Add tests for 'compiler-rt' multilib
andreisfr May 31, 2023
0f3f8d0
toolchain/xtensa: Use GNU linker when no GCC installation is detected
andreisfr Mar 25, 2024
cc4282f
tooclahin/xtensa: Add crt0.o to linker command line automatically
andreisfr May 31, 2023
36afc3b
[Xtensa] Implement __ieee754_sqrtf builtin
andreisfr May 31, 2023
e9c6c5c
compiler-rt/tests: Adds specific build options for Espressif targets
andreisfr Sep 27, 2023
b783a7e
compiler-rt/tests: Disable tests failing for Espressif targets
andreisfr Mar 25, 2024
7fa5100
esp/ci: Update newlib branch
andreisfr May 31, 2023
db966e0
esp/ci: Saves log for 'test_x86_64-linux-gnu'
andreisfr May 31, 2023
43f8b22
esp/ci: Update 'llvm-xtensa-testsuite' ref
andreisfr May 31, 2023
592ac63
esp/ci: Update 'xtensa-clang-toolchain' ref
andreisfr May 31, 2023
0509323
esp/ci: Upload only x86_64-linux-gnu distro to HTTP server
andreisfr May 31, 2023
464d6c6
esp/ci: stick to binutils 2.35
andreisfr May 31, 2023
8370597
[Xtensa] Fix i8/i16 ABI alignment.
andreisfr Sep 18, 2024
c0338af
esp/toolchain: Adds '-fdata-sections' to newlib target CFLAGS
andreisfr May 31, 2023
9aeb4f8
toolchain/esp: Bring 'libgcc' back to the toolchain
andreisfr May 31, 2023
48cdf98
[Xtensa] Respect srli assembler semantics.
andreisfr Aug 20, 2024
b57b54c
[LLD][Xtensa] Recognize bt instruction in lld
sstefan1 Jun 28, 2023
f86c623
[Xtensa] Fix asm parsing of special registers.
andreisfr Aug 20, 2024
52f1d86
[Xtensa] Implement ESP32 S3 DSP instructions.
andreisfr Aug 20, 2024
902086b
[Xtensa][esp32s3] Fix encoding for immediates with step increment
sstefan1 Aug 8, 2023
d174204
[Xtensa] Fix FP mul-sub fusion
zRedShift Jul 13, 2023
03a7ede
[Xtensa] Add more valid FMA patterns and tests 1. Prefer `fneg.s` to …
andreisfr Aug 20, 2024
bbb862c
[Xtensa] Add MINMAX feature
andreisfr Aug 20, 2024
45694d1
[Xtensa] Add CLAMPS feature
zRedShift Jul 16, 2023
ace4e75
[Xtensa] Connect `abs` to `llvm.abs`
andreisfr Aug 20, 2024
aa0b017
[Xtensa] ADD support of the CLAMPS/MINMAX in target parser.
andreisfr Jul 29, 2023
4cd5e09
[Xtensa] Handle musttail
andreisfr Aug 20, 2024
d3acb44
[Xtensa] Implement CTLZ/CTTZ with NSAU
andreisfr Aug 20, 2024
d6e51cd
[Xtensa] Add spill slot for smaller estimated stack size.
andreisfr Aug 20, 2024
eec8033
[Xtensa] Fix decoder namespace for ESP32S3.
andreisfr Sep 27, 2023
cf29a6a
[Xtensa] Fix hardware loop
andreisfr Aug 22, 2023
7bf036e
[Xtensa] Fix _FAST_ int types.
andreisfr Aug 21, 2024
f5d9e68
esp/ci: Makes use of MacOS codesign scripts from external repo
gerekon Aug 31, 2023
8a794c4
esp/ci: Use gold linker for Linux builds
gerekon Sep 1, 2023
d533d48
esp/ci: Adds cmake err/log artifacts
gerekon Sep 1, 2023
9b45993
[lld][Xtensa] Fix sections placements.
andreisfr Oct 11, 2023
1d6af9f
[lld][Xtensa] Improve literal sections placement.
andreisfr Oct 18, 2023
e6f2577
[lld][Xtensa] Fix loop instruction relocation
andreisfr Oct 30, 2023
3a356af
[Xtensa] Fix Clang builtins include directory
aykevl Oct 24, 2023
d8e2148
[Xtensa] Fix wchar type. Add absent IR passes.
andreisfr Aug 21, 2024
e8be995
[Xtensa][Tests]: Fix call abi test.
andreisfr Mar 25, 2024
c8e7cc2
esp/ci: Modify ci script to support Clang release 17.0.4
gerekon Dec 12, 2023
cd0b11f
[Xtensa] Fix hwloop tests.
andreisfr Sep 26, 2024
0b35ec4
esp/ci: Bump binutils version to esp-2.39.0_20230208
gerekon Dec 12, 2023
74d4014
esp/ci: Use GNU components from GCC release 12.2.0_20230208
gerekon Dec 12, 2023
a6c6043
[Toolchain][RISCV]: Add support for ISA 2.1 compliant multilib naming
gerekon Dec 12, 2023
929de77
esp/ci: Remove legacy release CI code
gerekon Dec 12, 2023
eab51e3
[Xtensa][RISCV] Fix multilib support
andreisfr Aug 21, 2024
42a4e9f
esp/ci: Split MacOS sign job (one per arch) to fit into artifacts siz…
gerekon Dec 28, 2023
875857b
esp/ci: Adds GH PR workflow to run tests
gerekon Dec 28, 2023
61fa839
[Toolchain][Xtensa][Tests] Fix calling clang++ in tests
gerekon Dec 29, 2023
1f547f6
[Xtensa] Add definition of S3 output registers.
maciej-czekaj Sep 11, 2023
642cda7
[Xtensa] Add Boolean Extension feature
andreisfr Sep 29, 2024
c8155ad
[Xtensa] Refactor loadImmediate
andreisfr Aug 21, 2024
41fb0a6
[Xtensa] Implement BRegFixupPass
andreisfr Aug 21, 2024
38d2e51
[Xtensa] Add LLVM tests for Boolean Extension
maciej-czekaj Mar 27, 2023
f8d4128
[Xtensa] Separate directory for Clang CodeGen tests
maciej-czekaj Mar 27, 2023
b90b76a
[Xtensa] Add ABI test for xtbool
maciej-czekaj Mar 27, 2023
c916bd4
[Xtensa] Implement conditional move instrinsics
andreisfr Aug 21, 2024
d954fa4
[Xtensa] Add basic float intrinsics
andreisfr Aug 21, 2024
a2484a4
[Xtensa] Implement remaining floating point intrinsics
andreisfr Aug 21, 2024
f97c1af
[Xtensa] Add Cannonlake CPU
maciej-czekaj Mar 27, 2023
c8a542e
[Xtensa] Make assembler output compatible with GAS
andreisfr Mar 26, 2024
217d4f0
[Xtensa] Fix hwloop tests.
andreisfr Sep 29, 2024
a7eacb4
[Xtensa] Add HIFI3 intrinsic functions
maciej-czekaj Jun 29, 2023
a33a019
[Xtensa] Add HIFI3 register classes
maciej-czekaj Jun 29, 2023
10891bf
[Xtensa] Add HIFI3 target feature
maciej-czekaj Jun 29, 2023
064fbbc
[Xtensa] Add HIFI3 instructions
maciej-czekaj Nov 13, 2023
f214ef4
[Xtensa] Add support for boolean vectors
andreisfr Sep 30, 2024
e7f0a0e
[Xtensa] Add HIFI3 instruction lowering
andreisfr Sep 30, 2024
85a4d93
[Xtensa] Add HIFI3 instruction selection patterns
andreisfr Sep 30, 2024
8e0f7d2
[Xtensa] Add codegen tests for vector operators
maciej-czekaj Jun 29, 2023
0c811dd
[Xtensa] Fix HIFI dsp gen operation test.
andreisfr Sep 30, 2024
f8bbc5f
[Xtensa] Support bit vectors in BRegFixupPass
maciej-czekaj Jun 29, 2023
92476b1
[Xtensa] Add codegen tests for bit vectors
maciej-czekaj Jun 29, 2023
8c04316
[Xtensa] Remove unsspported intrinsic xt_conjc_s
maciej-czekaj Jun 29, 2023
0a6ee3d
[Xtensa] Add HIFI3 intrinsic definitions to clang
andreisfr Sep 30, 2024
6fff22c
[Xtensa] Add constant checks for HIFI3 intrinsics
andreisfr Sep 30, 2024
4431686
[Xtensa] Support HIFI3 vectors in LLVM calls
maciej-czekaj Jun 29, 2023
32c14d6
[Xtensa] Add HIFI3 intrinsics to Clang codegen
andreisfr Mar 26, 2024
014eb14
[Xtensa] Fix xt_lsxp builtin definition
maciej-czekaj Jun 29, 2023
6750aa0
[Xtensa] Support bool vectors in LLVM calls
maciej-czekaj Jun 29, 2023
1c902f0
[Xtensa] Add --text-section-literals option
maciej-czekaj Jun 29, 2023
2035eca
[Xtensa] Add vector conversion builtins
andreisfr Oct 1, 2024
9df9ec2
[Xtensa] Add HIFI3 C types and intrinsics
andreisfr Oct 1, 2024
8d3dd40
[Xtensa] Add support for decoding from HIFI namespace
maciej-czekaj Oct 16, 2023
2192436
[Xtensa] Implement support for `__attribute__((short__call))` and `_…
andreisfr Oct 1, 2024
d25b790
[RISCV] Add 'tcontrol' CSR register
gerekon Oct 19, 2023
6da7a2e
[Toolchain][RISCV][Xtensa] Add Espressif baremetal.
andreisfr Oct 1, 2024
3b92cfc
[Toolchain][RISCV][Xtensa] Remove GCC installation support for Espres…
andreisfr Oct 1, 2024
926e3f1
[Clang] Fix undefined std::errc for MinGW build
gerekon Feb 22, 2024
6b10f0a
[LLD] Disable x86_64 specific test if target is no enabled
andreisfr Apr 1, 2024
175f796
esp/ci: Use CMake-based build scripts
gerekon Oct 19, 2023
70ad0c8
[Xtensa] Fix disassembler.
andreisfr Mar 7, 2024
5299c92
[Xtensa] Add predefined macros for core configuration
gerekon Mar 15, 2024
d7d815c
[Clang] Add stdint preprocessor tests for Xtensa
gerekon Mar 15, 2024
7d821ec
[LLVM][Xtensa] Remove DFP accelrator feature from ESP32-S3
gerekon Mar 15, 2024
1d54b93
[Clang][Xtensa] Add tests for core config pre-defined macros
gerekon Mar 15, 2024
69dbc78
esp/ci: Upgrade GCC toolchain components version to '13.2.0_20240305'
gerekon Mar 21, 2024
b720717
[Clang][RISCV] Fix baremetal test
andreisfr Mar 28, 2024
19d06ae
[Toolchain][Espressif] Use custom prefixes for 'as' and 'ld'
gerekon Mar 27, 2024
76de474
esp/ci: Switch to combined all-in-one toolchain
gerekon Mar 27, 2024
337b1fc
esp/ci: Add special build to run tests
gerekon Apr 12, 2024
443eac0
[Xtensa] Fix LOOP* pseudo instructions.
andreisfr Oct 1, 2024
93a4e7d
esp/ci: Upgrade docker image for Windows build to use MinGW 10
gerekon May 3, 2024
2cc4c57
[Xtensa] Fix issue with adding scavenging frame index
sstefan1 Apr 18, 2024
c7d3e98
esp/ci: Separate checksum files for toolchain and standalone libs dis…
gerekon May 14, 2024
052f6cf
[RISCV] Add user trap CSRs
gerekon May 14, 2024
730507e
[Xtensa] Add Xtensa builtins into last builtin ID calculation
gerekon Jul 5, 2024
e112a97
[Xtensa] Support for asm underscore prefix
andreisfr Oct 8, 2024
d34fe2f
[Clang][Xtensa] Improve esp baremetal toolchain. Fix tests.
andreisfr Oct 16, 2024
acc3019
[Xtensa] Fix atomic store operands order
gerekon Sep 10, 2024
e58e877
toolchain/esp: Add test for 'xesppie' multilib mapping for esp32-p4
gerekon Aug 21, 2024
277220c
[Clang][Xtensa] Fix Espressif baremetal toolchain tests.
gerekon Nov 12, 2024
c352401
[Xtensa][Test] Fix xtensa-ee-intrinsics test
gerekon Nov 13, 2024
fd1c569
[RISCV] Support for ESP32-P4 instructions in RISCV backend.
sstefan1 Nov 27, 2024
031fa7b
[Xtensa] Fix lowering BRCOND.
andreisfr Dec 14, 2024
296f186
[Xtensa] Fix lowering SELECT_CC and SETCC.
andreisfr Dec 14, 2024
1ba66c2
[Xtensa] Fix lowering ConstantPool.
andreisfr Dec 15, 2024
caf476f
[Xtensa] Fix lowering immediate.
andreisfr Dec 15, 2024
aa12798
[Xtensa] Fix emitting literals section.
andreisfr Dec 17, 2024
e5e3894
[Xtensa][Test] Fix compiler-rt test config.
andreisfr Dec 24, 2024
a01719f
esp/ci: Fix git dubious ownership error
gerekon Nov 13, 2024
54186c4
esp/ci: Use build script repo LLVM 19 release branch
gerekon Nov 14, 2024
46050f3
esp/ci: Update docker images for LLVM 19 release
gerekon Dec 26, 2024
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40 changes: 40 additions & 0 deletions .github/workflows/esp-clang-tests.yml
Original file line number Diff line number Diff line change
@@ -0,0 +1,40 @@
name: Clang Tests

permissions:
contents: read

on:
workflow_dispatch:
push:
ignore-forks: true
branches:
- '**_release_**'
paths:
- 'clang/**'
- '.github/workflows/esp-clang-tests.yml'
- '.github/workflows/llvm-project-tests.yml'
- '!llvm/**'
pull_request:
ignore-forks: true
branches:
- '**_release_**'
paths:
- 'clang/**'
- '.github/workflows/esp-clang-tests.yml'
- '.github/workflows/llvm-project-tests.yml'
- '!llvm/**'

concurrency:
# Skip intermediate builds: always.
# Cancel intermediate builds: only if it is a pull request build.
group: ${{ github.workflow }}-${{ github.ref }}
cancel-in-progress: ${{ startsWith(github.ref, 'refs/pull/') }}

jobs:
check_clang:
if: github.repository_owner == 'espressif'
name: Test clang
uses: ./.github/workflows/llvm-project-tests.yml
with:
build_target: check-clang
projects: clang
46 changes: 46 additions & 0 deletions .github/workflows/esp-llvm-tests.yml
Original file line number Diff line number Diff line change
@@ -0,0 +1,46 @@
name: LLVM Tests

permissions:
contents: read

on:
workflow_dispatch:
push:
ignore-forks: true
branches:
- '**_release_**'
paths:
- 'llvm/**'
- '.github/workflows/esp-llvm-tests.yml'
- '.github/workflows/llvm-project-tests.yml'
pull_request:
ignore-forks: true
branches:
- '**_release_**'
paths:
- 'llvm/**'
- '.github/workflows/esp-llvm-tests.yml'
- '.github/workflows/llvm-project-tests.yml'

concurrency:
# Skip intermediate builds: always.
# Cancel intermediate builds: only if it is a pull request build.
group: ${{ github.workflow }}-${{ github.ref }}
cancel-in-progress: ${{ startsWith(github.ref, 'refs/pull/') }}

jobs:
check_all:
if: github.repository_owner == 'espressif'
name: Test llvm,clang
uses: ./.github/workflows/llvm-project-tests.yml
with:
build_target: check-all
projects: clang

check_lld:
if: github.repository_owner == 'espressif'
name: Test lld
uses: ./.github/workflows/llvm-project-tests.yml
with:
build_target: check-lld
projects: lld
19 changes: 19 additions & 0 deletions .github/workflows/issue_comment.yml
Original file line number Diff line number Diff line change
@@ -0,0 +1,19 @@
name: Sync issue comments to JIRA

# This workflow will be triggered when new issue comment is created (including PR comments)
on: issue_comment

jobs:
sync_issue_comments_to_jira:
name: Sync Issue Comments to Jira
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@master
- name: Sync issue comments to JIRA
uses: espressif/github-actions/sync_issues_to_jira@master
env:
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
JIRA_PASS: ${{ secrets.JIRA_PASS }}
JIRA_PROJECT: LLVM
JIRA_URL: ${{ secrets.JIRA_URL }}
JIRA_USER: ${{ secrets.JIRA_USER }}
19 changes: 19 additions & 0 deletions .github/workflows/new_issues.yml
Original file line number Diff line number Diff line change
@@ -0,0 +1,19 @@
name: Sync issues to Jira

# This workflow will be triggered when a new issue is opened
on: issues

jobs:
sync_issues_to_jira:
name: Sync issues to Jira
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@master
- name: Sync GitHub issues to Jira project
uses: espressif/github-actions/sync_issues_to_jira@master
env:
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
JIRA_PASS: ${{ secrets.JIRA_PASS }}
JIRA_PROJECT: LLVM
JIRA_URL: ${{ secrets.JIRA_URL }}
JIRA_USER: ${{ secrets.JIRA_USER }}
24 changes: 24 additions & 0 deletions .github/workflows/new_prs.yml
Original file line number Diff line number Diff line change
@@ -0,0 +1,24 @@
name: Sync remain PRs to Jira

# This workflow will be triggered every hour, to sync remaining PRs (i.e. PRs with zero comment) to Jira project
# Note that, PRs can also get synced when new PR comment is created
on:
schedule:
- cron: "0 * * * *"

jobs:
sync_prs_to_jira:
name: Sync PRs to Jira
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@master
- name: Sync PRs to Jira project
uses: espressif/github-actions/sync_issues_to_jira@master
with:
cron_job: true
env:
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
JIRA_PASS: ${{ secrets.JIRA_PASS }}
JIRA_PROJECT: LLVM
JIRA_URL: ${{ secrets.JIRA_URL }}
JIRA_USER: ${{ secrets.JIRA_USER }}
3 changes: 3 additions & 0 deletions .gitignore
Original file line number Diff line number Diff line change
Expand Up @@ -28,6 +28,9 @@

# Nested build directory
/build*
/*/build-*
/_build
/_dist

#==============================================================================#
# Explicit files to ignore (only matches one).
Expand Down
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