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Add Mixed HDL Blink example #338

Merged
merged 12 commits into from
Oct 14, 2020
Merged

Add Mixed HDL Blink example #338

merged 12 commits into from
Oct 14, 2020

Commits on Oct 12, 2020

  1. doc: open source tooling exists for VHDL

    @umarcor
    umarcor committed Oct 12, 2020
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  2. doc: spinal.rst does not exist

    @umarcor
    umarcor committed Oct 12, 2020
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  3. doc: verilog/blink does not expose signals

    @umarcor
    umarcor committed Oct 12, 2020
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  4. move 'verilog/pcf' to root

    @umarcor
    umarcor committed Oct 12, 2020
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  5. add vhdl/blink

    @umarcor
    umarcor committed Oct 12, 2020
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  6. get-toolchain: use 'nightly' toolchain in CI

    @umarcor
    umarcor committed Oct 12, 2020
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  7. docs: update and split requirements

    @umarcor
    umarcor committed Oct 12, 2020
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  8. doc: add labels to HDL sections

    @umarcor
    umarcor committed Oct 12, 2020
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  9. add mixed-hdl/blink

    @umarcor
    umarcor committed Oct 12, 2020
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  10. add board.mk

    @umarcor
    umarcor committed Oct 12, 2020
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Commits on Oct 13, 2020

  1. mixed-hdl: keyword 'component' is not required when instantiating 

    Co-authored-by: T. Meissner <[email protected]>
    @umarcor @tmeissner
    umarcor and tmeissner committed Oct 13, 2020
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  2. mixed-hdl: remove '-q' from yosys call 

    Co-authored-by: T. Meissner <[email protected]>
    @umarcor @tmeissner
    umarcor and tmeissner committed Oct 13, 2020
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