Skip to content
CI

[sival/aes] Introduce AES Stall Status Bit test #3130

Sign in to view logs

[sival/aes] Introduce AES Stall Status Bit test

[sival/aes] Introduce AES Stall Status Bit test #3130

Re-run triggered December 11, 2024 13:10
@engdoreisengdoreis
#25564
github-gcontributor:vt_checkins_stall_new
Status Success
Total duration 3m 20s
Artifacts 34

ci.yml

on: pull_request
Lint (quick)
3m 14s
Lint (quick)
Earl Grey for CW310 Hyperdebug  /  Build bitstream
1m 48s
Earl Grey for CW310 Hyperdebug / Build bitstream
Earl Grey for CW340  /  Build bitstream
1m 52s
Earl Grey for CW340 / Build bitstream
Earl Grey for CW310  /  Build bitstream
1m 47s
Earl Grey for CW310 / Build bitstream
Lint (slow)
13m 9s
Lint (slow)
Airgapped build
8m 44s
Airgapped build
Verible lint
1m 1s
Verible lint
Run OTBN smoke Test
2m 51s
Run OTBN smoke Test
Run OTBN crypto tests
2m 33s
Run OTBN crypto tests
Verilated English Breakfast
7m 43s
Verilated English Breakfast
Verilated Earl Grey
1h 26m
Verilated Earl Grey
CW305's Bitstream
22m 26s
CW305's Bitstream
Build Docker Containers
2m 43s
Build Docker Containers
Build and test software
15m 2s
Build and test software
CW310 SiVal Tests  /  FPGA test
25m 8s
CW310 SiVal Tests / FPGA test
CW310 SiVal ROM_EXT Tests  /  FPGA test
35m 59s
CW310 SiVal ROM_EXT Tests / FPGA test
CW310 Manufacturing Tests  /  FPGA test
31m 59s
CW310 Manufacturing Tests / FPGA test
CW340 Test ROM Tests  /  FPGA test
2m 36s
CW340 Test ROM Tests / FPGA test
CW340 ROM Tests  /  FPGA test
1m 16s
CW340 ROM Tests / FPGA test
CW340 ROM_EXT Tests  /  FPGA test
3m 36s
CW340 ROM_EXT Tests / FPGA test
CW340 SiVal Tests  /  FPGA test
17m 34s
CW340 SiVal Tests / FPGA test
CW340 SiVal ROM_EXT Tests  /  FPGA test
4m 1s
CW340 SiVal ROM_EXT Tests / FPGA test
CW340 Manufacturing Tests  /  FPGA test
5m 56s
CW340 Manufacturing Tests / FPGA test
CW310 Test ROM Tests  /  FPGA test
3m 42s
CW310 Test ROM Tests / FPGA test
CW310 ROM Tests  /  FPGA test
40m 45s
CW310 ROM Tests / FPGA test
CW310 ROM_EXT Tests  /  FPGA test
6m 30s
CW310 ROM_EXT Tests / FPGA test
Cache bitstreams to GCP
0s
Cache bitstreams to GCP
Verify FPGA jobs
24s
Verify FPGA jobs
Fit to window
Zoom out
Zoom in

Annotations

6 errors
Lint (slow)
Countermeasure check failed.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Countermeasure check failed.
Lint (slow)
Process completed with exit code 1.
Build and test software
Process completed with exit code 1.

Artifacts

Produced during runtime
Name Size
execute_test_rom_fpga_tests_cw340-targets
258 Bytes
execute_test_rom_fpga_tests_cw340-test-results
45.5 KB