[chore] Remove unnecessary generic in MemoryReadAuxCols

crates/vm/src/system/memory/controller/mod.rs

@@ -704,10 +704,7 @@ pub struct MemoryAuxColsFactory<T> {
 
 // NOTE[jpw]: The `make_*_aux_cols` functions should be thread-safe so they can be used in parallelized trace generation.
 impl<F: PrimeField32> MemoryAuxColsFactory<F> {
-    pub fn make_read_aux_cols<const N: usize>(
-        &self,
-        read: &MemoryRecord<F>,
-    ) -> MemoryReadAuxCols<F, N> {
+    pub fn make_read_aux_cols(&self, read: &MemoryRecord<F>) -> MemoryReadAuxCols<F> {
         assert!(
             !read.address_space.is_zero(),
             "cannot make `MemoryReadAuxCols` for address space 0"

crates/vm/src/system/memory/offline_checker/bridge.rs

@@ -49,7 +49,7 @@ impl MemoryBridge {
         address: MemoryAddress<impl Into<T>, impl Into<T>>,
         data: [impl Into<T>; N],
         timestamp: impl Into<T>,
-        aux: &'a MemoryReadAuxCols<V, N>,
+        aux: &'a MemoryReadAuxCols<V>,
     ) -> MemoryReadOperation<'a, T, V, N> {
         MemoryReadOperation {
             offline_checker: self.offline_checker,
@@ -110,7 +110,7 @@ pub struct MemoryReadOperation<'a, T, V, const N: usize> {
     address: MemoryAddress<T, T>,
     data: [T; N],
     timestamp: T,
-    aux: &'a MemoryReadAuxCols<V, N>,
+    aux: &'a MemoryReadAuxCols<V>,
 }
 
 /// The max degree of constraints is:

crates/vm/src/system/memory/offline_checker/columns.rs

@@ -68,11 +68,11 @@ impl<const N: usize, F: FieldAlgebra> MemoryWriteAuxCols<F, N> {
 /// the address space, pointer, and data must be provided.
 #[repr(C)]
 #[derive(Clone, Copy, Debug, AlignedBorrow)]
-pub struct MemoryReadAuxCols<T, const N: usize> {
+pub struct MemoryReadAuxCols<T> {
     pub(super) base: MemoryBaseAuxCols<T>,
 }
 
-impl<const N: usize, F: PrimeField32> MemoryReadAuxCols<F, N> {
+impl<F: PrimeField32> MemoryReadAuxCols<F> {
     pub fn new(prev_timestamp: u32, clk_lt_aux: LessThanAuxCols<F, AUX_LEN>) -> Self {
         Self {
             base: MemoryBaseAuxCols {
@@ -83,7 +83,7 @@ impl<const N: usize, F: PrimeField32> MemoryReadAuxCols<F, N> {
     }
 }
 
-impl<const N: usize, F: FieldAlgebra + Copy> MemoryReadAuxCols<F, N> {
+impl<F: FieldAlgebra + Copy> MemoryReadAuxCols<F> {
     pub const fn disabled() -> Self {
         Self {
             base: MemoryBaseAuxCols {

crates/vm/src/system/memory/tests.rs

@@ -56,9 +56,9 @@ struct MemoryRequesterCols<T> {
     timestamp: T,
     write_1_aux: MemoryWriteAuxCols<T, 1>,
     write_4_aux: MemoryWriteAuxCols<T, 4>,
-    read_1_aux: MemoryReadAuxCols<T, 1>,
-    read_4_aux: MemoryReadAuxCols<T, 4>,
-    read_max_aux: MemoryReadAuxCols<T, MAX>,
+    read_1_aux: MemoryReadAuxCols<T>,
+    read_4_aux: MemoryReadAuxCols<T>,
+    read_max_aux: MemoryReadAuxCols<T>,
     is_write_1: T,
     is_write_4: T,
     is_read_1: T,

extensions/keccak256/circuit/src/air.rs

@@ -407,7 +407,7 @@ impl KeccakVmAir {
         &self,
         builder: &mut AB,
         local: &KeccakVmCols<AB::Var>,
-        register_aux: &[MemoryReadAuxCols<AB::Var, RV32_REGISTER_NUM_LIMBS>; KECCAK_REGISTER_READS],
+        register_aux: &[MemoryReadAuxCols<AB::Var>; KECCAK_REGISTER_READS],
     ) -> AB::Expr {
         let instruction = local.instruction;
         // Only receive opcode if:
@@ -514,7 +514,7 @@ impl KeccakVmAir {
         builder: &mut AB,
         local: &KeccakVmCols<AB::Var>,
         start_read_timestamp: AB::Expr,
-        mem_aux: &[MemoryReadAuxCols<AB::Var, KECCAK_WORD_SIZE>; KECCAK_ABSORB_READS],
+        mem_aux: &[MemoryReadAuxCols<AB::Var>; KECCAK_ABSORB_READS],
     ) -> AB::Expr {
         let partial_block = &local.mem_oc.partial_block;
         // Only read input from memory when it is an opcode-related row

extensions/keccak256/circuit/src/columns.rs

@@ -96,8 +96,8 @@ pub struct KeccakSpongeCols<T> {
 #[repr(C)]
 #[derive(Clone, Debug, AlignedBorrow)]
 pub struct KeccakMemoryCols<T> {
-    pub register_aux: [MemoryReadAuxCols<T, RV32_REGISTER_NUM_LIMBS>; KECCAK_REGISTER_READS],
-    pub absorb_reads: [MemoryReadAuxCols<T, KECCAK_WORD_SIZE>; KECCAK_ABSORB_READS],
+    pub register_aux: [MemoryReadAuxCols<T>; KECCAK_REGISTER_READS],
+    pub absorb_reads: [MemoryReadAuxCols<T>; KECCAK_ABSORB_READS],
     pub digest_writes: [MemoryWriteAuxCols<T, KECCAK_WORD_SIZE>; KECCAK_DIGEST_WRITES],
     /// The input bytes are batch read in blocks of private constant KECCAK_WORD_SIZE bytes. However
     /// if the input length is not a multiple of KECCAK_WORD_SIZE, we read into

extensions/native/circuit/src/adapters/convert_adapter.rs

@@ -73,7 +73,7 @@ pub struct ConvertAdapterCols<T, const READ_SIZE: usize, const WRITE_SIZE: usize
     pub a_as: T,
     pub b_as: T,
     pub writes_aux: [MemoryWriteAuxCols<T, WRITE_SIZE>; 1],
-    pub reads_aux: [MemoryReadAuxCols<T, READ_SIZE>; 1],
+    pub reads_aux: [MemoryReadAuxCols<T>; 1],
 }
 
 #[derive(Clone, Copy, Debug, derive_new::new)]

extensions/native/circuit/src/adapters/loadstore_native_adapter.rs

@@ -106,8 +106,8 @@ pub struct NativeLoadStoreAdapterCols<T, const NUM_CELLS: usize> {
     pub data_write_as: T,
     pub data_write_pointer: T,
 
-    pub pointer_read_aux_cols: MemoryReadAuxCols<T, 1>,
-    pub data_read_aux_cols: MemoryReadAuxCols<T, NUM_CELLS>,
+    pub pointer_read_aux_cols: MemoryReadAuxCols<T>,
+    pub data_read_aux_cols: MemoryReadAuxCols<T>,
     pub data_write_aux_cols: MemoryWriteAuxCols<T, NUM_CELLS>,
 }
 

extensions/native/circuit/src/adapters/native_vectorized_adapter.rs

@@ -70,7 +70,7 @@ pub struct NativeVectorizedAdapterCols<T, const N: usize> {
     pub b_pointer: T,
     pub c_pointer: T,
     pub c_as: T,
-    pub reads_aux: [MemoryReadAuxCols<T, N>; 2],
+    pub reads_aux: [MemoryReadAuxCols<T>; 2],
     pub writes_aux: [MemoryWriteAuxCols<T, N>; 1],
 }
 

extensions/native/circuit/src/fri/mod.rs

@@ -58,13 +58,13 @@ pub struct FriReducedOpeningCols<T> {
     pub alpha_ptr: T,
     pub alpha_pow_ptr: T,
 
-    pub a_ptr_aux: MemoryReadAuxCols<T, 1>,
-    pub b_ptr_aux: MemoryReadAuxCols<T, 1>,
-    pub a_aux: MemoryReadAuxCols<T, 1>,
-    pub b_aux: MemoryReadAuxCols<T, EXT_DEG>,
+    pub a_ptr_aux: MemoryReadAuxCols<T>,
+    pub b_ptr_aux: MemoryReadAuxCols<T>,
+    pub a_aux: MemoryReadAuxCols<T>,
+    pub b_aux: MemoryReadAuxCols<T>,
     pub result_aux: MemoryWriteAuxCols<T, EXT_DEG>,
-    pub length_aux: MemoryReadAuxCols<T, 1>,
-    pub alpha_aux: MemoryReadAuxCols<T, EXT_DEG>,
+    pub length_aux: MemoryReadAuxCols<T>,
+    pub alpha_aux: MemoryReadAuxCols<T>,
     pub alpha_pow_aux: MemoryBaseAuxCols<T>,
 
     pub a_ptr: T,

extensions/native/circuit/src/poseidon2/columns.rs

@@ -32,10 +32,10 @@ pub struct NativePoseidon2MemoryCols<T> {
     pub rd_ptr: T,
     pub rs_val: [T; 2],
     pub rd_val: T,
-    pub rs_read_aux: [MemoryReadAuxCols<T, 1>; 2],
-    pub rd_read_aux: MemoryReadAuxCols<T, 1>,
+    pub rs_read_aux: [MemoryReadAuxCols<T>; 2],
+    pub rd_read_aux: MemoryReadAuxCols<T>,
 
-    pub chunk_read_aux: [MemoryReadAuxCols<T, NATIVE_POSEIDON2_CHUNK_SIZE>; 2],
+    pub chunk_read_aux: [MemoryReadAuxCols<T>; 2],
     pub chunk_write_aux: [MemoryWriteAuxCols<T, NATIVE_POSEIDON2_CHUNK_SIZE>; 2],
 }
 

extensions/rv32-adapters/src/eq_mod.rs

@@ -59,8 +59,8 @@ pub struct Rv32IsEqualModAdapterCols<
 
     pub rs_ptr: [T; NUM_READS],
     pub rs_val: [[T; RV32_REGISTER_NUM_LIMBS]; NUM_READS],
-    pub rs_read_aux: [MemoryReadAuxCols<T, RV32_REGISTER_NUM_LIMBS>; NUM_READS],
-    pub heap_read_aux: [[MemoryReadAuxCols<T, BLOCK_SIZE>; BLOCKS_PER_READ]; NUM_READS],
+    pub rs_read_aux: [MemoryReadAuxCols<T>; NUM_READS],
+    pub heap_read_aux: [[MemoryReadAuxCols<T>; BLOCKS_PER_READ]; NUM_READS],
 
     pub rd_ptr: T,
     pub writes_aux: MemoryWriteAuxCols<T, RV32_REGISTER_NUM_LIMBS>,

extensions/rv32-adapters/src/heap_branch.rs

@@ -51,9 +51,9 @@ pub struct Rv32HeapBranchAdapterCols<T, const NUM_READS: usize, const READ_SIZE:
 
     pub rs_ptr: [T; NUM_READS],
     pub rs_val: [[T; RV32_REGISTER_NUM_LIMBS]; NUM_READS],
-    pub rs_read_aux: [MemoryReadAuxCols<T, RV32_REGISTER_NUM_LIMBS>; NUM_READS],
+    pub rs_read_aux: [MemoryReadAuxCols<T>; NUM_READS],
 
-    pub heap_read_aux: [MemoryReadAuxCols<T, READ_SIZE>; NUM_READS],
+    pub heap_read_aux: [MemoryReadAuxCols<T>; NUM_READS],
 }
 
 #[derive(Clone, Copy, Debug, derive_new::new)]

extensions/rv32-adapters/src/vec_heap.rs

@@ -144,10 +144,10 @@ pub struct Rv32VecHeapAdapterCols<
     pub rs_val: [[T; RV32_REGISTER_NUM_LIMBS]; NUM_READS],
     pub rd_val: [T; RV32_REGISTER_NUM_LIMBS],
 
-    pub rs_read_aux: [MemoryReadAuxCols<T, RV32_REGISTER_NUM_LIMBS>; NUM_READS],
-    pub rd_read_aux: MemoryReadAuxCols<T, RV32_REGISTER_NUM_LIMBS>,
+    pub rs_read_aux: [MemoryReadAuxCols<T>; NUM_READS],
+    pub rd_read_aux: MemoryReadAuxCols<T>,
 
-    pub reads_aux: [[MemoryReadAuxCols<T, READ_SIZE>; BLOCKS_PER_READ]; NUM_READS],
+    pub reads_aux: [[MemoryReadAuxCols<T>; BLOCKS_PER_READ]; NUM_READS],
     pub writes_aux: [MemoryWriteAuxCols<T, WRITE_SIZE>; BLOCKS_PER_WRITE],
 }
 

extensions/rv32-adapters/src/vec_heap_two_reads.rs

@@ -158,12 +158,12 @@ pub struct Rv32VecHeapTwoReadsAdapterCols<
     pub rs2_val: [T; RV32_REGISTER_NUM_LIMBS],
     pub rd_val: [T; RV32_REGISTER_NUM_LIMBS],
 
-    pub rs1_read_aux: MemoryReadAuxCols<T, RV32_REGISTER_NUM_LIMBS>,
-    pub rs2_read_aux: MemoryReadAuxCols<T, RV32_REGISTER_NUM_LIMBS>,
-    pub rd_read_aux: MemoryReadAuxCols<T, RV32_REGISTER_NUM_LIMBS>,
+    pub rs1_read_aux: MemoryReadAuxCols<T>,
+    pub rs2_read_aux: MemoryReadAuxCols<T>,
+    pub rd_read_aux: MemoryReadAuxCols<T>,
 
-    pub reads1_aux: [MemoryReadAuxCols<T, READ_SIZE>; BLOCKS_PER_READ1],
-    pub reads2_aux: [MemoryReadAuxCols<T, READ_SIZE>; BLOCKS_PER_READ2],
+    pub reads1_aux: [MemoryReadAuxCols<T>; BLOCKS_PER_READ1],
+    pub reads2_aux: [MemoryReadAuxCols<T>; BLOCKS_PER_READ2],
     pub writes_aux: [MemoryWriteAuxCols<T, WRITE_SIZE>; BLOCKS_PER_WRITE],
 }
 

extensions/rv32im/circuit/src/adapters/alu.rs

@@ -89,7 +89,7 @@ pub struct Rv32BaseAluAdapterCols<T> {
     pub rs2: T,
     /// 1 if rs2 was a read, 0 if an immediate
     pub rs2_as: T,
-    pub reads_aux: [MemoryReadAuxCols<T, RV32_REGISTER_NUM_LIMBS>; 2],
+    pub reads_aux: [MemoryReadAuxCols<T>; 2],
     pub writes_aux: MemoryWriteAuxCols<T, RV32_REGISTER_NUM_LIMBS>,
 }
 
@@ -311,7 +311,7 @@ impl<F: PrimeField32> VmAdapterChip<F> for Rv32BaseAluAdapterChip<F> {
             row_slice.rs2_as = F::ZERO;
             row_slice.reads_aux = [
                 aux_cols_factory.make_read_aux_cols(rs1),
-                MemoryReadAuxCols::<F, RV32_REGISTER_NUM_LIMBS>::disabled(),
+                MemoryReadAuxCols::<F>::disabled(),
             ];
         }
         row_slice.writes_aux = aux_cols_factory.make_write_aux_cols(rd);

extensions/rv32im/circuit/src/adapters/branch.rs

@@ -73,7 +73,7 @@ pub struct Rv32BranchAdapterCols<T> {
     pub from_state: ExecutionState<T>,
     pub rs1_ptr: T,
     pub rs2_ptr: T,
-    pub reads_aux: [MemoryReadAuxCols<T, RV32_REGISTER_NUM_LIMBS>; 2],
+    pub reads_aux: [MemoryReadAuxCols<T>; 2],
 }
 
 #[derive(Clone, Copy, Debug, derive_new::new)]

extensions/rv32im/circuit/src/adapters/hintstore.rs

@@ -89,7 +89,7 @@ pub struct Rv32HintStoreAdapterCols<T> {
     pub from_state: ExecutionState<T>,
     pub rs1_ptr: T,
     pub rs1_data: [T; RV32_REGISTER_NUM_LIMBS],
-    pub rs1_aux_cols: MemoryReadAuxCols<T, RV32_REGISTER_NUM_LIMBS>,
+    pub rs1_aux_cols: MemoryReadAuxCols<T>,
 
     pub imm: T,
     pub imm_sign: T,

extensions/rv32im/circuit/src/adapters/jalr.rs

@@ -69,7 +69,7 @@ pub struct Rv32JalrWriteRecord {
 pub struct Rv32JalrAdapterCols<T> {
     pub from_state: ExecutionState<T>,
     pub rs1_ptr: T,
-    pub rs1_aux_cols: MemoryReadAuxCols<T, RV32_REGISTER_NUM_LIMBS>,
+    pub rs1_aux_cols: MemoryReadAuxCols<T>,
     pub rd_ptr: T,
     pub rd_aux_cols: MemoryWriteAuxCols<T, RV32_REGISTER_NUM_LIMBS>,
     pub needs_write: T,

extensions/rv32im/circuit/src/adapters/loadstore.rs

@@ -153,11 +153,11 @@ pub struct Rv32LoadStoreAdapterCols<T> {
     pub from_state: ExecutionState<T>,
     pub rs1_ptr: T,
     pub rs1_data: [T; RV32_REGISTER_NUM_LIMBS],
-    pub rs1_aux_cols: MemoryReadAuxCols<T, RV32_REGISTER_NUM_LIMBS>,
+    pub rs1_aux_cols: MemoryReadAuxCols<T>,
 
     /// Will write to rd when Load and read from rs2 when Store
     pub rd_rs2_ptr: T,
-    pub read_data_aux: MemoryReadAuxCols<T, RV32_REGISTER_NUM_LIMBS>,
+    pub read_data_aux: MemoryReadAuxCols<T>,
     pub imm: T,
     pub imm_sign: T,
     /// mem_ptr is the intermediate memory pointer limbs, needed to check the correct addition

extensions/rv32im/circuit/src/adapters/mul.rs

@@ -75,7 +75,7 @@ pub struct Rv32MultAdapterCols<T> {
     pub rd_ptr: T,
     pub rs1_ptr: T,
     pub rs2_ptr: T,
-    pub reads_aux: [MemoryReadAuxCols<T, RV32_REGISTER_NUM_LIMBS>; 2],
+    pub reads_aux: [MemoryReadAuxCols<T>; 2],
     pub writes_aux: MemoryWriteAuxCols<T, RV32_REGISTER_NUM_LIMBS>,
 }
 

extensions/sha256/circuit/src/sha256_chip/columns.rs

@@ -8,15 +8,15 @@ use openvm_circuit_primitives::AlignedBorrow;
 use openvm_instructions::riscv::RV32_REGISTER_NUM_LIMBS;
 use openvm_sha256_air::{Sha256DigestCols, Sha256RoundCols};
 
-use super::{SHA256_READ_SIZE, SHA256_REGISTER_READS, SHA256_WRITE_SIZE};
+use super::{SHA256_REGISTER_READS, SHA256_WRITE_SIZE};
 
 /// the first 16 rows of every SHA256 block will be of type Sha256VmRoundCols and the last row will be of type Sha256VmDigestCols
 #[repr(C)]
 #[derive(Clone, Copy, Debug, AlignedBorrow)]
 pub struct Sha256VmRoundCols<T> {
     pub control: Sha256VmControlCols<T>,
     pub inner: Sha256RoundCols<T>,
-    pub read_aux: MemoryReadAuxCols<T, SHA256_READ_SIZE>,
+    pub read_aux: MemoryReadAuxCols<T>,
 }
 
 #[repr(C)]
@@ -33,7 +33,7 @@ pub struct Sha256VmDigestCols<T> {
     pub dst_ptr: [T; RV32_REGISTER_NUM_LIMBS],
     pub src_ptr: [T; RV32_REGISTER_NUM_LIMBS],
     pub len_data: [T; RV32_REGISTER_NUM_LIMBS],
-    pub register_reads_aux: [MemoryReadAuxCols<T, RV32_REGISTER_NUM_LIMBS>; SHA256_REGISTER_READS],
+    pub register_reads_aux: [MemoryReadAuxCols<T>; SHA256_REGISTER_READS],
     pub writes_aux: MemoryWriteAuxCols<T, SHA256_WRITE_SIZE>,
 }