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W02_PHJ #6

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Empty file added PHJu/Addsub4b.v
Empty file.
37 changes: 37 additions & 0 deletions PHJu/Counter.v
Original file line number Diff line number Diff line change
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module Counter(i_Clk, i_Rst, i_Push, o_LED1,o_LED2, o_FND);
input i_Clk; // 50MHz
input i_Rst;
input [1:0] i_Push;
output wire [3:0] o_LED1;
output wire [3:0] o_LED2;
output wire [6:0] o_FND;

reg [3:0] c_Cnt, n_Cnt;
reg [1:0] c_UpDn, n_UpDn;

wire fUp;
wire fDn;

FND FND0(c_Cnt, o_FND);

always@(posedge i_Clk, posedge i_Rst)
if(i_Rst) begin
c_Cnt = 0;
c_UpDn = 2'b11;
end else begin
c_Cnt = n_Cnt;
c_UpDn = n_UpDn;
end

assign {fUp, fDn} = ~i_Push & c_UpDn;
assign o_LED1 = c_Cnt >= 10 ? c_Cnt / 10 : 0;
assign o_LED2 = c_Cnt >= 10 ? c_Cnt % 10 : c_Cnt;
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새로운 해결방법! o_LED에 대한 값을 10 처리를 했네요 ㅎㅎ
아쉬운건 어차피 값은 c_Cnt에 저장이 되니 c_Cnt에 저장되는 부분을 손봤으면 어땠을까 싶네요

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그 때 설명을 들었을때 한 세그먼트에 0~9까지 표현이 된다고 기억을 했습니다 그래서 저는 1의 자리와 10의 자리도 표현하고 싶어서 세그먼트를 하나 더 만들려고 했고 그거를 10으로 나누어서 몫과 나머지로 표현,,,하고자 했습니다


always@*
begin
n_UpDn = i_Push;
n_Cnt = fUp ? c_Cnt * 2 :
fDn ? c_Cnt / 2 : c_Cnt + 2;
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여긴 일부러 손본건가요? 여기 있는 코드 대로라면

  1. fUp가 1인 경우 : 현재 값에 2를 곱한다
  2. fDown가 1인 경우 : 현재 값을 2로 나눈다
  3. 둘 다 아닌 경우 : c_Cnt에 2를 더한다
    이렇게 되는데 의도한 부분이 맞나요? 매 클락마다 2씩 더해질텐데..!

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일부러 손댄 것이 맞습니다 원래 1씩 더해지고 빼는 식이었는데 저는 2가 계속 곱해도보고 나누고 싶었고 둘 다 아니라면 2를 더하고 싶었숨다

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1번 버튼은 * 2
2번 버튼은 / 2 일 때
언제 +2가 되는 걸 의도한건가요?? 만약 이대로라면 1초에 5,000,000번 2가 더해지게 돼서 그냥 FND가 반짝반짝 거리는 걸로 보일 것 같은데 ㅋㅋㅋㅋ

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ㅋㅎㅋㅎㅋㅎㅋㅎㅋㅎ 이때 왜 그랬는지는 모르겠는데 지금 다시 보니까 +2가 없고 그냥 c_Cnt로 했었어야 했는데 그래서 고쳐서 올릴려고 해요

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@yuyu0830 LED지우고 코드 FND를 추가했는데 맞는지 확인 부탁드려도 될까요..?🥺

end

endmodule
20 changes: 20 additions & 0 deletions PHJu/FND.v
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module FND(i_Num, o_FND);
input [3:0] i_Num;
output reg [6:0] o_FND;

always@*
case(i_Num)
4'h0: o_FND = 7'b1000000;
4'h1: o_FND = 7'b1111001;
4'h2: o_FND = 7'b0100100;
4'h3: o_FND = 7'b0110000;
4'h4: o_FND = 7'b0011001;
4'h5: o_FND = 7'b0010010;
4'h6: o_FND = 7'b0000010;
4'h7: o_FND = 7'b1111000;
4'h8: o_FND = 7'b0000000;
4'h9: o_FND = 7'b0010000;
default: o_FND = 7'b1111111;
endcase

endmodule
43 changes: 43 additions & 0 deletions PHJu/tb_Counter.v
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`timescale 1 ns / 1ns
module tb_Cnt();
reg Clk;
reg Rst;
reg [1:0] Push;
wire[3:0] Cnt_o_LED;

Counter U0(Clk, Rst, Push, Cnt_o_LED,);

always
#10 Clk = ~Clk;

initial
begin
// initialize
Clk = 1;
Rst = 1;
Push = 2'b11;

// reset
@(posedge Clk) Rst = 1;
@(negedge Clk) Rst = 0;

// action
#200 Push = 2'b01; #200 Push = 2'b11;
#200 Push = 2'b01; #200 Push = 2'b11;
#200 Push = 2'b01; #200 Push = 2'b11;
#200 Push = 2'b01; #200 Push = 2'b11;
#200 Push = 2'b01; #200 Push = 2'b11;
#200 Push = 2'b01; #200 Push = 2'b11;
#200 Push = 2'b01; #200 Push = 2'b11;
#200 Push = 2'b01; #200 Push = 2'b11;
#200 Push = 2'b01; #200 Push = 2'b11;
#200 Push = 2'b10; #200 Push = 2'b11;
#200 Push = 2'b10; #200 Push = 2'b11;
#200 Push = 2'b10; #200 Push = 2'b11;
#200 Push = 2'b10; #200 Push = 2'b11;
#200 Push = 2'b10; #200 Push = 2'b11;
#200 Push = 2'b10; #200 Push = 2'b11;
#200 Push = 2'b10; #200 Push = 2'b11;
#200 Push = 2'b10; #200 Push = 2'b11;
end
endmodule