Conversion of LaTeX spec to asciidoc.

[wmat]

Conversion of LaTeX specification to asciidoc.

[wmat]

Hi @jhauser-us all of the issues you listed above have been addressed.

[wmat]

Hi @jhauser-us just wanted to check in to see if you've had a chance to review.

[jhauser-us]

The next batch of errors I've found:

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In Section 4.2, "Interrupt domains":

In the caption for Figure 4, the word that is missing (should be "... four harts that implement M-mode and S-mode, ...").

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In Section 4.5, "Memory-mapped control region for an interrupt domain":

In Table 6, the underscore characters are missing from the names of the in_clrip registers, and the names of registers setipnum_le and setipnum_be.

In Table 6, the register at offset 0x1F7C is mislabeled as setie[31]; it should instead be clrie[31].

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In Section 4.5.2, "Source configurations (sourcecfg[1]-sourcecfg[1023])":

The comma in this sentence has become misplaced: "When interrupt source i is not delegated to a child domain, sourcecfg[i] has this format: ...."

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In Section 4.5.3, "Machine MSI address configuration (mmsiaddrcfg and mmsiaddrcfgh)":

In the first sentence of the second paragraph, register domaincfg is misspelled as "comaincfg".

The comma in this sentence has become misplaced: "When implemented, mmsiaddrcfg has this format: ...."

The format shown for register mmsiaddrcfgh incorrectly has field L as bits 31:0 instead of just bit 31.

In the sentence that begins "In that case, if these other fields were given nonzero values when L was first set ...", register names "mmsiaddrcfg" and "mmsiaddrcfgh" are dropped at the end (should be "... visible by reading mmsiaddrcfg and mmsiaddrcfgh.").

In the sentence that begins "If an APLIC supports additional forms of reset ...", the parenthetical "(as well as smsiaddrcfg and smsiaddrcfgh)" has been changed to "(as well smsiaddrcfg as and smsiaddrcfgh)".

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In Section 4.5.4, "Supervisor MSI address configuration (smsiaddrcfg and smsiaddrcfgh)":

The section title has an extra left parenthesis.

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In Section 4.5.5, "Set interrupt-pending bits (setip[0]–setip[31])":

The first sentence is missing the word writing (should be "Reading or writing register setip[k] ...").

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In Section 4.5.8, "Clear interrupt-pending bit by number (clripnum)":

The first sentence is missing the register name clripnum (should be "... writing 32-bit value i to register clripnum causes ...").

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In Section 4.5.9, "Set interrupt-enable bits (setie[0]–setie[31])":

The first sentence is missing the word register (should be "Reading or writing register setie[k] ...").

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In Section 4.5.12, "Clear interrupt-enable bit by number (clrienum)":

The last sentence is missing the word of (should be "A read of clrienum always returns zero.").

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In Section 4.5.13, "Set interrupt-pending bit by number, little-endian (setipnum le)":

In the second paragraph, register setipnum_le has been incorrectly replaced by setipnum_be (should be "... setipnum_le need not be implemented, ..."), and the word are is missing (should be "... the four bytes at this offset are simply read-only zeros ...").

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In Section 4.5.14, "Set interrupt-pending bit by number, big-endian (setipnum be)":

The name of register setipnum_be is misspelled as "setipnym_be".

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In Section 4.6, "Reset":

The word UNSPECIFIED and the register name domaincfg are missing (should be "Upon reset of an APLIC, all its state becomes valid and consistent but otherwise UNSPECIFIED, except for: the domaincfg register of each interrupt domain ...").

In the last bullet item, a left parenthesis is missing before the word Section.

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In Section 4.8.1.4, "Top interrupt (topi)":

In the sentence that begins "A read of topi returns zero either if ...", the first instance of register name ithreshold is missing (should be "... or if ithreshold is not zero ...").

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In Section 4.8.2, "Interrupt delivery and handling":

In the example pseudocode for a trap handler, the variable i is missing from this step: "call the interrupt handler for external interrupt i (minor identity)".

In the last sentence, the closing quotation marks are missing around "external interrupt 0".

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In Section 4.9.1, "Addresses and data for outgoing MSIs":

In the first paragraph, parentheses are missing around "Section 4.5.3 and Section 4.5.4".

The formula for a machine-level interrupt domain's MSI address is missing a second right parenthesis after "LHXS". Also, for clarity, it might be smart to add a space after the first left parenthesis (before "Base PPN") and between the last two right parentheses, so the outermost parentheses are better set off.

In the sentence that begins "The address for the MSI is then computed using this machine-level hart index ...", register name mmsiaddrcfgh is missing.

For a supervisor-level domain, the formulas for g and h have the parentheses misplaced that should be around "2^HHXW - 1" and "2^LHXW - 1".

The formula for a supervisor-level domain's MSI address is missing a second right parenthesis after "HHXS + 12".

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In Section 5.1, "Defined major interrupts and default priorities":

In Table 9, "Categorization of current and future major interrupts", the word Designated is misspelled as "Deisgnated".

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In Section 5.2.1, "Configuring priorities of major interrupts at machine level":

In the sentence that begins "When XLEN = 64 and miselect is an odd value ...", the number 0x3F is miswritten as "ox3F".

Table 10 ("Effect of the machine-level iprio array on the priorities of interrupts taken in M-mode") is incorrectly located within a "NOTE".

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In Section 5.2.2, "Machine top interrupt CSR (mtopi)":

In the sentence that begins "If all bytes of the machine-level iprio array are read-only zeros ...", the register name mtopi is missing (should be "... whenever mtopi is not zero").

In the example pseudocode for a machine-level trap handler, the variable i is missing from this step: "call the interrupt handler for major interrupt i".

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In Section 5.3, "Interrupt filtering and virtual interrupts for supervisor level":

In the last sentence ("When supervisor mode is not implemented, ..."), register name mvip is miswritten as "svip".

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In Section 5.4.1, "Configuring priorities of major interrupts at supervisor level":

In the sentence that begins "When XLEN = 64 and siselect is an odd value ...", the number 0x3F is miswritten as "ox3F".

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In Section 5.4.2, "Supervisor top interrupt CSR (stopi)":

In the sentence that begins "The following pseudocode shows ...", the register name stopi is missing (should be "... handler might read stopi to avoid ...").

In the example pseudocode for a supervisor-level trap handler, the variable i is missing from this step: "call the interrupt handler for major interrupt i".

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In Section 5.5, "WFI (Wait for Interrupt) instruction":

In the sentence that begins "And if the hypervisor extension is implemented, ...", register name vstopi is missing (should be "... at VS level if vstopi (Section 6.3.3) is not zero").

[wmat]

Thanks again, @jhauser-us all of these issues have been fixed. Note that a few of them exist in the released spec, so the asciidoc version is moving forward with corrections that the original spec does not have.

[jhauser-us]

Note that a few of them exist in the released spec,

Really? Which ones? I've been comparing directly with the released spec.

[wmat]

I believe one of the - i in the pseudocode and one of the spelling mistakes that I can't remember off the top of my head. I can check again tomorrow. It's possible my pdf of the released spec is old though.