Hexagon adapter and small additions #22
Merged
Commits on Mar 16, 2024
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Add option to disable the IO cache reset for every new frame.
This is necessary if architectures need the context they are embedded in. Context means: Instruction word +- x bytes. For Hexagon the disassembly and IL steps are incorrect, if the context is not the same every time and differs from the actual binary. Because instructions disassemble differently depending on their neighbors. If the neighbor instruction of a packet indicated the start of it, and during the IL step execution this neighboring instructions is no longer the same, the interpretation is different and the IL step is invalid.
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Fix: Read sf.data() not as string.
If the sf bytes contain a '\0' byte, the code.size() call later returned the wrong size. Hence we directly read it as ut8 *
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Add a post-op list with all registers and their count.
If the post-operand list had a register twice in it and the last entry had the correct value, a mismatch happened anyway. Because the first value was tested and did not match. This is not correct, since multiple writes to a register can happen. Only the last post-operand should be considered.
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