Align jump targets to 4 bytes #210
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We use unconditional jumps to reach these locations but I think the RISC-V unconditional jump cannot express locations that are not aligned to 4 bytes.
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Good catch! I wonder if 4 byte alignment is enough or it depends on the bus width? |
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While testing the new v-trap implementation from #200 I noticed that upon trapping a vectored interrupt, the program counter ends up halfway between instructions right before
_start_DefaultHandler_trapcausing an illegal instruction exception.The cause seems to be that this location (
_start_DefaultHandler_trap) is reached via direct unconditional jump in_continue_interrupt_trapand the jump instruction is taken at 4-byte alignment. Setting these symbols to .align 4 fixes the problem on our (custom) machine.I think it's a feature of RISC-V unconditional jumps that they can't express addresses below 4-byte alignment but it could be a feature(bug) of our machine as well. I'm a bit confused about this still because the disassembly shows the correct target
j 119a <_start_DefaultHandler_trap>while the machine ends up jumping to1198and failing.