Stable release of 20191110_68p4, testing release of 20190119_69p0

gateware/bitfiles/testing/20200119_69p0/README.md

@@ -0,0 +1,40 @@
+Hermes-Lite 2.x Gateware
+========================
+
+## 20200119_69p0 Release
+
+ This version identifies as revision 69.0. Changes in this version are listed below. See the [updating gateware wiki page](https://github.com/softerhardware/Hermes-Lite2/wiki/Updating-Gateware) for more details.
+
+ * Bug fixed where PureSignal was not on proper receiver for 4 receiver gateware. See the [PureSignal wiki page](https://github.com/softerhardware/Hermes-Lite2/wiki/PureSignal) for details on how to setup and use PureSignal with the Hermes-Lite 2.
+
+ * Fan PWM implemented. Modes are based on temperature:
+  * Low speed turns on at 35C, off at 30C
+  * Medium speed turns on at 40C, back to low speed at 35C
+  * Full speed turns on at 45C, back to medium speed at 40C
+  * TX disabled at 55C, enabled at 50C or by power cycling the unit
+
+ * IO assignment updated so that all new IO signals connected to DB1. See the [IO wiki page](https://github.com/softerhardware/Hermes-Lite2/wiki/IO). Beta3to4 and beta2 have different IO connections but UART and fan are implemented for these builds. See the variant Verilog files hermeslite.v for pin assignments.
+
+ * The [metis discovery reply](https://github.com/softerhardware/Hermes-Lite2/wiki/Protocol#metis-discovery-reply) now includes a variant ID to identify if this board is a hl2b5up, hl2b3and4 or hl2b2.
+
+
+### File Key
+
+Most people will use the file root and suffix in bold below, hl2b5up_main.rbf, for programming over ethernet.
+
+* hl2b2 - Hermes-Lite 2.0 beta2
+* hl2b3to4 - Hermes-Lite 2.0 beta3 or beta4
+* **hl2b5up - Hermes-Lite 2.0 build5 and later**
+* hl2b5up_6rx - Hermes-Lite 2.0 build5 and later, 6 RX, no TX
+
+* .jic - Nonvolatile EEPROM programming with Quartus
+* **.rbf - Raw binary format for programming over ethernet using openhpsdr protocol 1**
+* .sof - Volatile FPGA-only programming with Quartus
+* jic.jam - Nonvolatile EEPROM programming with JAM/STAPL player
+* sof.jam - Volatile FPGA-only programming with JAM/STAPL player
+* .svf - Volatile FPGA-only programming with urjtag or openocd 
+
+
+
+
+

gateware/rtl/control.v

@@ -803,30 +803,30 @@ generate case (FAN)
 
       case (fan_state)
         FAN_OFF: begin
-          if (temperature > TEMP_25C) fan_state_next = FAN_LOWSPEED;
+          if (temperature > TEMP_35C) fan_state_next = FAN_LOWSPEED;
           fan_pwm = 1'b0;
         end
 
         FAN_LOWSPEED: begin
-          if (temperature > TEMP_30C) fan_state_next = FAN_MEDSPEED;
-          else if (temperature < TEMP_20C) fan_state_next = FAN_OFF;
+          if (temperature > TEMP_40C) fan_state_next = FAN_MEDSPEED;
+          else if (temperature < TEMP_30C) fan_state_next = FAN_OFF;
           fan_pwm = fan_cnt[15]; // on 50% of time
         end
 
         FAN_MEDSPEED: begin
-          if (temperature > TEMP_35C) fan_state_next = FAN_FULLSPEED;
-          else if (temperature < TEMP_25C) fan_state_next = FAN_LOWSPEED;
+          if (temperature > TEMP_45C) fan_state_next = FAN_FULLSPEED;
+          else if (temperature < TEMP_35C) fan_state_next = FAN_LOWSPEED;
           fan_pwm = fan_cnt[15] | fan_cnt[14]; // on 75% of time
         end
 
         FAN_FULLSPEED: begin
-          if (temperature > TEMP_40C) fan_state_next = FAN_OVERHEAT;
-          else if (temperature < TEMP_30C) fan_state_next = FAN_MEDSPEED;
+          if (temperature > TEMP_55C) fan_state_next = FAN_OVERHEAT;
+          else if (temperature < TEMP_40C) fan_state_next = FAN_MEDSPEED;
           fan_pwm = 1'b1; // on 100% of time
         end
 
         FAN_OVERHEAT: begin
-          if (temperature < TEMP_35C) fan_state_next = FAN_FULLSPEED;
+          if (temperature < TEMP_50C) fan_state_next = FAN_FULLSPEED;
           fan_pwm = 1'b1;
           temp_enabletx = 1'b0;
         end

gateware/rtl/radio_openhpsdr1/radio.v

@@ -386,13 +386,14 @@ vna_scanner #(.CICRATE(CICRATE), .RATE48(RATE48)) rx_vna (  // use this output f
     .tx_freq_in(tx_phase0),
     .tx_freq(tx0_phase),
     .tx_zero(tx0_phase_zero),
+    .rx0_phase(rx0_phase),
     .vna_count(vna_count)
     );
 
 
   // First receiver
   // If in VNA mode use the Tx[0] phase word for the first receiver phase
-  assign rx0_phase = vna ? tx0_phase : rx_phase[0];
+  //assign rx0_phase = vna ? tx0_phase : rx_phase[0];
 
   mix2 #(.CALCTYPE(3)) mix2_0 (
     .clk(clk),

gateware/rtl/radio_openhpsdr1/vna_scanner.v

@@ -42,6 +42,7 @@ module vna_scanner (
   input               [31:0] tx_freq_in   ,
   output logic        [31:0] tx_freq      ,
   output logic        [ 1:0] tx_zero      ,
+  output logic        [31:0] rx0_phase    ,
   input               [15:0] vna_count
 );
 
@@ -73,11 +74,13 @@ logic        [31:0] tx_freq_next       ;
 always @(posedge clk) begin
   if (!vna) begin // Not in VNA mode; operate as a regular receiver
     tx_freq   <= tx_freq_in;
+    rx0_phase <= freq_delta;
     vna_state <= VNA_STARTUP;
     tx_zero   <= 2'b00;
   end else begin
     vna_state      <= vna_state_next;
     tx_freq        <= tx_freq_next;
+    rx0_phase      <= tx_freq_next;
     tx_zero        <= {(tx_freq_next[31:16] == 16'h0), (tx_freq_next[15:0] == 16'h0)};
     vna_counter    <= vna_counter_next;
     vna_decimation <= vna_decimation_next;

gateware/variants/hl2b2_main/hermeslite.v

@@ -92,13 +92,15 @@ module hermeslite (
   assign rffe_ad9866_pga5 = 6'h00;
 
   hermeslite_core #(
-    .BOARD(2                                    ),
-    .IP   ({8'd0,8'd0,8'd0,8'd0}                ),
-    .MAC  ({8'h00,8'h1c,8'hc0,8'ha2,8'h12,8'hdd}),
-    .NR   (4                                    ),
-    .NT   (1                                    ),
-    .UART (0                                    ),
-    .ATU  (0                                    )
+    .BOARD (2                                    ),
+    .IP    ({8'd0,8'd0,8'd0,8'd0}                ),
+    .MAC   ({8'h00,8'h1c,8'hc0,8'ha2,8'h12,8'hdd}),
+    .NR    (4                                    ),
+    .NT    (1                                    ),
+    .UART  (1                                    ),
+    .ATU   (0                                    ),
+    .FAN   (1                                    ),
+    .PSSYNC(1                                    )
   ) hermeslite_core_i (
     .pwr_clk3p3                (pwr_clk3p3           ),
     .pwr_clk1p2                (pwr_clk1p2           ),
@@ -135,8 +137,8 @@ module hermeslite (
     .io_led_tx                 (io_led_d3            ),
     .io_led_adc75              (io_led_d4            ),
     .io_led_adc100             (io_led_d5            ),
-    .io_tx_envelope_pwm_out    (io_cn4_7             ),
-    .io_tx_envelope_pwm_out_inv(io_cn4_6             ),
+    .io_tx_envelope_pwm_out    (io_cl1               ),
+    .io_tx_envelope_pwm_out_inv(                     ),
     .io_tx_inhibit             (io_cn8               ),
     .io_id_hermeslite          (io_cn9               ),
     .io_alternate_mac          (io_cn10              ),
@@ -146,13 +148,14 @@ module hermeslite (
     .io_sda2                   (io_sda2              ),
     .io_uart_txd               (io_db24_1            ),
     .io_uart_rxd               (io_tp2               ),
-    .io_cw_keydown             (io_cl1               ),
+    .io_cw_keydown             (                     ),
     .io_phone_tip              (io_phone_tip         ),
     .io_phone_ring             (io_phone_ring        ),
     .io_atu_ack                (1'b0                 ),
     .io_atu_req                (                     ),
     .pa_inttr                  (pa_tr                ),
-    .pa_exttr                  (                     )
+    .pa_exttr                  (                     ),
+    .fan_pwm                   (io_cn4_6             )
   );
 
 endmodule

gateware/variants/hl2b3to4_main/hermeslite.v

@@ -95,13 +95,15 @@ module hermeslite (
 
 
   hermeslite_core #(
-    .BOARD(3                                    ),
-    .IP   ({8'd0,8'd0,8'd0,8'd0}                ),
-    .MAC  ({8'h00,8'h1c,8'hc0,8'ha2,8'h23,8'hdd}),
-    .NR   (4                                    ),
-    .NT   (1                                    ),
-    .UART (0                                    ),
-    .ATU  (0                                    )
+    .BOARD (3                                    ),
+    .IP    ({8'd0,8'd0,8'd0,8'd0}                ),
+    .MAC   ({8'h00,8'h1c,8'hc0,8'ha2,8'h23,8'hdd}),
+    .NR    (4                                    ),
+    .NT    (1                                    ),
+    .UART  (1                                    ),
+    .ATU   (0                                    ),
+    .FAN   (1                                    ),
+    .PSSYNC(1                                    )
   ) hermeslite_core_i (
     .pwr_clk3p3                (pwr_clk3p3           ),
     .pwr_clk1p2                (pwr_clk1p2           ),
@@ -138,8 +140,8 @@ module hermeslite (
     .io_led_tx                 (io_led_d3            ),
     .io_led_adc75              (io_led_d4            ),
     .io_led_adc100             (io_led_d5            ),
-    .io_tx_envelope_pwm_out    (io_cn4_7             ),
-    .io_tx_envelope_pwm_out_inv(io_cn4_6             ),
+    .io_tx_envelope_pwm_out    (io_cl1               ),
+    .io_tx_envelope_pwm_out_inv(                     ),
     .io_tx_inhibit             (io_cn8               ),
     .io_id_hermeslite          (io_cn9               ),
     .io_alternate_mac          (io_cn10              ),
@@ -149,13 +151,14 @@ module hermeslite (
     .io_sda2                   (io_sda2              ),
     .io_uart_txd               (io_db24_1            ),
     .io_uart_rxd               (io_tp2               ),
-    .io_cw_keydown             (io_cl1               ),
+    .io_cw_keydown             (                     ),
     .io_phone_tip              (io_phone_tip         ),
     .io_phone_ring             (io_phone_ring        ),
     .io_atu_ack                (1'b0                 ),
     .io_atu_req                (                     ),
     .pa_inttr                  (pa_inttr             ),
-    .pa_exttr                  (pa_exttr             )
+    .pa_exttr                  (pa_exttr             ),
+    .fan_pwm                   (io_cn4_6             )
   );
 
 endmodule

gateware/variants/hl2b5up_6rx/hermeslite.v

@@ -95,13 +95,15 @@ module hermeslite (
 
 
   hermeslite_core #(
-    .BOARD(5                                    ),
-    .IP   ({8'd0,8'd0,8'd0,8'd0}                ),
-    .MAC  ({8'h00,8'h1c,8'hc0,8'ha2,8'h13,8'hdd}),
-    .NR   (6                                    ),
-    .NT   (0                                    ),
-    .UART (0                                    ),
-    .ATU  (0                                    )
+    .BOARD (5                                    ),
+    .IP    ({8'd0,8'd0,8'd0,8'd0}                ),
+    .MAC   ({8'h00,8'h1c,8'hc0,8'ha2,8'h13,8'hdd}),
+    .NR    (6                                    ),
+    .NT    (0                                    ),
+    .UART  (0                                    ),
+    .ATU   (0                                    ),
+    .FAN   (1                                    ),
+    .PSSYNC(1                                    )
   ) hermeslite_core_i (
     .pwr_clk3p3                (pwr_clk3p3           ),
     .pwr_clk1p2                (pwr_clk1p2           ),
@@ -155,7 +157,8 @@ module hermeslite (
     .io_atu_ack                (io_cn9               ),
     .io_atu_req                (io_db1_2             ),
     .pa_inttr                  (pa_inttr             ),
-    .pa_exttr                  (pa_exttr             )
+    .pa_exttr                  (pa_exttr             ),
+    .fan_pwm                   (io_db1_4             )
   );
 
 endmodule

gateware/variants/hl2b5up_main/hermeslite.v

@@ -77,10 +77,10 @@ module hermeslite (
   inout        io_scl2              ,
   inout        io_sda2              ,
   //
-  output       io_db1_2             ,
+  input        io_db1_2             ,
   output       io_db1_3             ,
   output       io_db1_4             ,
-  output       io_db1_5             ,
+  input        io_db1_5             ,
   output       io_db1_6             ,
   input        io_phone_tip         ,
   input        io_phone_ring        ,
@@ -140,8 +140,8 @@ module hermeslite (
     .io_led_tx                 (io_led_d3            ),
     .io_led_adc75              (io_led_d4            ),
     .io_led_adc100             (io_led_d5            ),
-    .io_tx_envelope_pwm_out    (io_db1_6             ),
-    .io_tx_envelope_pwm_out_inv(io_db1_5             ),
+    .io_tx_envelope_pwm_out    (io_db1_1             ),
+    .io_tx_envelope_pwm_out_inv(                     ),
     .io_tx_inhibit             (io_cn8               ),
     .io_id_hermeslite          (io_cn9               ),
     .io_alternate_mac          (io_cn10              ),
@@ -150,12 +150,12 @@ module hermeslite (
     .io_scl2                   (io_scl2              ),
     .io_sda2                   (io_sda2              ),
     .io_uart_txd               (io_db1_3             ),
-    .io_uart_rxd               (io_tp2               ),
-    .io_cw_keydown             (io_db1_1             ),
+    .io_uart_rxd               (io_db1_2             ),
+    .io_cw_keydown             (                     ),
     .io_phone_tip              (io_phone_tip         ),
     .io_phone_ring             (io_phone_ring        ),
-    .io_atu_ack                (io_cn9               ),
-    .io_atu_req                (io_db1_2             ),
+    .io_atu_ack                (io_db1_5             ),
+    .io_atu_req                (io_db1_6             ),
     .pa_inttr                  (pa_inttr             ),
     .pa_exttr                  (pa_exttr             ),
     .fan_pwm                   (io_db1_4             )

gateware/variants/release.py

@@ -3,7 +3,8 @@
 import os
 from shutil import copy2 as cp
 
-subdirs = ["hl2b5up_6rx","hl2b5up_main","hl2b3to4_main","hl2b2_main"]
+subdirs = ["hl2b5up_main"]
+subdirs_alt = ["hl2b5up_6rx","hl2b3to4_main","hl2b2_main"]
 
 
 for subdir in subdirs:
@@ -18,3 +19,14 @@
   except:
     print("Failures for {0}".format(subdir))
 
+for subdir in subdirs_alt:
+  os.system("mkdir -p release/variants/{0}".format(subdir))
+  try:
+    cp("{0}/build/hermeslite.sof".format(subdir),"release/variants/{0}/{0}.sof".format(subdir))
+    cp("{0}/build/hermeslite.rbf".format(subdir),"release/variants/{0}/{0}.rbf".format(subdir))
+    cp("{0}/build/hermeslite.jic".format(subdir),"release/variants/{0}/{0}.jic".format(subdir))
+    cp("{0}/build/hermeslitejic.jam".format(subdir),"release/variants/{0}/{0}jic.jam".format(subdir))
+    cp("{0}/build/hermeslitesof.jam".format(subdir),"release/variants/{0}/{0}sof.jam".format(subdir))
+    cp("{0}/build/hermeslitesof.svf".format(subdir),"release/variants/{0}/{0}sof.svf".format(subdir))
+  except:
+    print("Failures for {0}".format(subdir))

hardware/enclosure/endcaps/kf7o/hl2_40b/README.md

@@ -61,6 +61,13 @@ Below is a picture of assembled fan control components. Note that a 2 pin header
 
 ![](../pictures/endplates4.jpg)
 
+The fan algorithm in the HL2 behaves as follows. When the HL2 is first powered on, the fan will briefly turn on. This helps verify that the fan is working.
+
+ * Low speed turns on at 35C, off at 30C
+ * Medium speed turns on at 40C, back to low speed at 35C
+ * Full speed turns on at 45C, back to medium speed at 40C
+ * TX disabled at 55C, enabled at 50C or by power cycling the unit
+
 ## Surface Mount Headers
 
 Below is a picture with the surface mount headers installed. J2 provides connection for power and signals from the HL2. J3 provides extra connectivity for output signals in case they must be used elsewhere.