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Update Bender.yml with RVFI define
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micprog authored and vogelpi committed Jan 21, 2021
1 parent 54becdb commit a93f5c8
Showing 1 changed file with 3 additions and 3 deletions.
6 changes: 3 additions & 3 deletions Bender.yml
Original file line number Diff line number Diff line change
@@ -1,6 +1,5 @@
package:
name: ibex
authors: []

sources:
- include_dirs:
Expand All @@ -27,14 +26,15 @@ sources:
- rtl/ibex_core.sv
- shared/rtl/prim_assert.sv
- target: rtl
defines: {RVFI: true}
files:
- rtl/ibex_pkg.sv
- rtl/ibex_tracer_pkg.sv
- rtl/ibex_tracer.sv
- rtl/ibex_core_tracing.sv
- target: all(rtl, tsmc55, gf22)
- target: any(rtl, tsmc55, gf22)
files:
- rtl/ibex_register_file_latch.sv
- target: all(xilinx)
- target: xilinx
files:
- rtl/ibex_register_file_fpga.sv

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