28: Add support for 64-bit targets r=dvc94ch a=Disasm



Co-authored-by: Vadim Kaushan <[email protected]>

27: Add 'entry' and 'pre_init' attributes r=dvc94ch a=Disasm

Implementation is based on [`cortex-m-rt-macros`](https://github.com/rust-embedded/cortex-m-rt/tree/master/macros) code.

This implementation has been changed to make `static mut` unsafe inside entry point and different handlers.

Related: rust-embedded/riscv-rt#20

Co-authored-by: Vadim Kaushan <[email protected]>

30: Fix docs, add MSRV policy, bump version r=dvc94ch a=Disasm



Co-authored-by: Vadim Kaushan <[email protected]>

… dependency graph

This reverts commit 373d773.

32: Rename RISCV to RISC-V r=laanwj a=Disasm

The same as here: #25

Co-authored-by: Vadim Kaushan <[email protected]>

31: New linker script and multi-core support r=laanwj a=Disasm

* Linker script was reworked. Now it uses region aliases to relocate sections. This approach makes it possible to build firmware for both FLASH+RAM and RAM-only targets. Memory definitions now supposed to be present in their corresponding crates (e.g. RAM definition in PAC crate, FLASH definition in board support crate).
* Multi-core support was introduced. Cores are parked with `_mp_hook` function and then awakened in platform-dependent way.
* Documentation was updated to reflect new features.
* New crate version: 0.6.0

Depends on: #28
Closes: rust-embedded/riscv-rt#26

Co-authored-by: Vadim Kaushan <[email protected]>

Rust nightly has started generating this section for RISC-V executables,
place it at the start of the bss area.

35: Add .sbss section to linker script r=Disasm a=laanwj

Rust nightly has started generating this section for RISC-V executables, place it at the start of the bss area.

```
  = note: rust-lld: error: no memory region specified for section '.sbss'
```

I think this is correct, looking at other uses of the section, though I could find no definitive documentation for this.

Co-authored-by: Wladimir J. van der Laan <[email protected]>

36: Fix linker script r=laanwj a=Disasm

This PR fixes
* section alignment issues
* section flags (now both `.heap` and `.stack` are `NOBITS`)
* wrong offsets with overridden `_stext`

Co-authored-by: Vadim Kaushan <[email protected]>

37: Fix _start_trap save/restore sequences r=laanwj a=Disasm



Co-authored-by: Vadim Kaushan <[email protected]>

Clang doesn't seem to generate these, but GCC does. I'm trying to
link secp256k1, which is a C library, to my Rust code so the linker
script needs to include these sections too.

38: link.x: Add .sdata2 sections r=Disasm a=laanwj

Clang doesn't seem to generate these, but GCC (8.3.0 at least) does. I'm trying to link secp256k1, which is a C library, to my Rust code so the linker script needs to include these sections too.

Co-authored-by: Wladimir J. van der Laan <[email protected]>

40: Simple typo fix r=almindor a=iankronquist

Just poking around and noticed this. Hope it's not too much trouble.

Co-authored-by: Ian Kronquist <[email protected]>

Assigning to the dot inside the section declaration is section
relative, not absolute.

41: Make linker script compatible with GNU linker. r=Disasm a=pftbest

Assigning to the dot inside the section declaration is section
relative, not absolute.

Co-authored-by: Vadzim Dambrouski <[email protected]>

Don't clutter the .init section needlessly.

43: Place abort in the .text section r=Disasm a=istankovic

Don't clutter the .init section needlessly.

Co-authored-by: Ivan Stankovic <[email protected]>
Co-authored-by: Ivan Stankovic <[email protected]>

46: Assure address of PC at startup. r=Disasm a=elfmimi

PR created upon @Disasm 's request. 

Closes: #44

Need update of library files after merging.

Co-authored-by: Ein Terakawa <[email protected]>
Co-authored-by: Vadim Kaushan <[email protected]>

42: Implement interrupt and exception handling, bump version r=almindor a=Disasm



Co-authored-by: Vadim Kaushan <[email protected]>

45: Add support for the riscv32i target r=almindor a=Disasm

Ported from [fomu-rt](https://github.com/im-tomu/fomu-rt)

Closes: rust-embedded/riscv-rt#34

Co-authored-by: Vadim Kaushan <[email protected]>

48: Release v0.7.0 r=almindor a=Disasm



Co-authored-by: Vadim Kaushan <[email protected]>

50: Document MSRV on README r=Disasm a=eldruin

See: rust-embedded/wg#445

Co-authored-by: Diego Barrios Romero <[email protected]>

…mation location-independent

51: CI fixes and improvements r=almindor a=Disasm



Co-authored-by: Vadim Kaushan <[email protected]>

52: Only checking for necessary extensions when linking, made debug information location-independent r=almindor a=ilya-epifanov

Regarding the debug information:
```diff
1c1
< In archive src/oss/riscv-rt-orig/bin/riscv32i-unknown-none-elf.a:
---
> In archive src/oss/riscv-rt/bin/riscv32i-unknown-none-elf.a:
335,336c335,336
<     <18>   DW_AT_comp_dir    : (indirect string, offset: 0x6): /home/disasm/dev/rust/embedded/workspace/riscv-rt
<     <1c>   DW_AT_producer    : (indirect string, offset: 0x38): GNU AS 2.32
---
>     <18>   DW_AT_comp_dir    : (indirect string, offset: 0x6): /riscv-rt
>     <1c>   DW_AT_producer    : (indirect string, offset: 0x10): GNU AS 2.34
367,371c367,368
<   0x00000000 61736d2e 53002f68 6f6d652f 64697361 asm.S./home/disa
<   0x00000010 736d2f64 65762f72 7573742f 656d6265 sm/dev/rust/embe
<   0x00000020 64646564 2f776f72 6b737061 63652f72 dded/workspace/r
<   0x00000030 69736376 2d727400 474e5520 41532032 iscv-rt.GNU AS 2
<   0x00000040 2e333200                            .32.
---
>   0x00000000 61736d2e 53002f72 69736376 2d727400 asm.S./riscv-rt.
>   0x00000010 474e5520 41532032 2e333400          GNU AS 2.34.
386c383
<   Version:               1
---
>   Version:               3
```

Versions are still different, but at least the build paths are independent from the build environment.

Co-authored-by: Ilya Epifanov <[email protected]>

53: fix rust fmt to not mangle externs r=Disasm a=almindor

Cargo fmt mangled all the `extern "Rust"` cases, this fixes it and cleans up the code.

Co-authored-by: Ales Katona <[email protected]>